X-Git-Url: http://pilppa.org/gitweb/gitweb.cgi?a=blobdiff_plain;f=arch%2Fmips%2Fpci%2Fops-au1000.c;h=9a57c5ab91dd515fdd83319f918e2ac7ce1922b5;hb=3e5621edb3392b28efb260ac99b2d26fb8b44e73;hp=6b29904acf451936093ccbaa8d2af9b759502325;hpb=37ca506adc395a028cd12760eca419dd0dc14b5c;p=linux-2.6-omap-h63xx.git diff --git a/arch/mips/pci/ops-au1000.c b/arch/mips/pci/ops-au1000.c index 6b29904acf4..9a57c5ab91d 100644 --- a/arch/mips/pci/ops-au1000.c +++ b/arch/mips/pci/ops-au1000.c @@ -1,10 +1,9 @@ /* * BRIEF MODULE DESCRIPTION - * Alchemy/AMD Au1x00 pci support. + * Alchemy/AMD Au1xx0 PCI support. * - * Copyright 2001,2002,2003 MontaVista Software Inc. - * Author: MontaVista Software, Inc. - * ppopov@mvista.com or source@mvista.com + * Copyright 2001-2003, 2007-2008 MontaVista Software Inc. + * Author: MontaVista Software, Inc. * * Support for all devices (greater than 16) added by David Gathright. * @@ -28,6 +27,7 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 675 Mass Ave, Cambridge, MA 02139, USA. */ + #include #include #include @@ -36,9 +36,9 @@ #include -#undef DEBUG -#ifdef DEBUG -#define DBG(x...) printk(x) +#undef DEBUG +#ifdef DEBUG +#define DBG(x...) printk(KERN_DEBUG x) #else #define DBG(x...) #endif @@ -46,7 +46,6 @@ #define PCI_ACCESS_READ 0 #define PCI_ACCESS_WRITE 1 - int (*board_pci_idsel)(unsigned int devsel, int assert); void mod_wired_entry(int entry, unsigned long entrylo0, @@ -69,16 +68,32 @@ void mod_wired_entry(int entry, unsigned long entrylo0, write_c0_pagemask(old_pagemask); } -struct vm_struct *pci_cfg_vm; +static struct vm_struct *pci_cfg_vm; static int pci_cfg_wired_entry; -static int first_cfg = 1; -unsigned long last_entryLo0, last_entryLo1; +static unsigned long last_entryLo0, last_entryLo1; + +/* + * We can't ioremap the entire pci config space because it's too large. + * Nor can we call ioremap dynamically because some device drivers use + * the PCI config routines from within interrupt handlers and that + * becomes a problem in get_vm_area(). We use one wired TLB to handle + * all config accesses for all busses. + */ +void __init au1x_pci_cfg_init(void) +{ + /* Reserve a wired entry for PCI config accesses */ + pci_cfg_vm = get_vm_area(0x2000, VM_IOREMAP); + if (!pci_cfg_vm) + panic(KERN_ERR "PCI unable to get vm area\n"); + pci_cfg_wired_entry = read_c0_wired(); + add_wired_entry(0, 0, (unsigned long)pci_cfg_vm->addr, PM_4K); + last_entryLo0 = last_entryLo1 = 0xffffffff; +} static int config_access(unsigned char access_type, struct pci_bus *bus, - unsigned int dev_fn, unsigned char where, - u32 * data) + unsigned int dev_fn, unsigned char where, u32 *data) { -#if defined( CONFIG_SOC_AU1500 ) || defined( CONFIG_SOC_AU1550 ) +#if defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550) unsigned int device = PCI_SLOT(dev_fn); unsigned int function = PCI_FUNC(dev_fn); unsigned long offset, status; @@ -98,55 +113,35 @@ static int config_access(unsigned char access_type, struct pci_bus *bus, au_sync_udelay(1); /* - * We can't ioremap the entire pci config space because it's - * too large. Nor can we call ioremap dynamically because some - * device drivers use the pci config routines from within - * interrupt handlers and that becomes a problem in get_vm_area(). - * We use one wired tlb to handle all config accesses for all - * busses. To improve performance, if the current device - * is the same as the last device accessed, we don't touch the - * tlb. - */ - if (first_cfg) { - /* reserve a wired entry for pci config accesses */ - first_cfg = 0; - pci_cfg_vm = get_vm_area(0x2000, VM_IOREMAP); - if (!pci_cfg_vm) - panic(KERN_ERR "PCI unable to get vm area\n"); - pci_cfg_wired_entry = read_c0_wired(); - add_wired_entry(0, 0, (unsigned long)pci_cfg_vm->addr, PM_4K); - last_entryLo0 = last_entryLo1 = 0xffffffff; - } - - /* Allow board vendors to implement their own off-chip idsel. + * Allow board vendors to implement their own off-chip IDSEL. * If it doesn't succeed, may as well bail out at this point. */ - if (board_pci_idsel) { - if (board_pci_idsel(device, 1) == 0) { - *data = 0xffffffff; - local_irq_restore(flags); - return -1; - } + if (board_pci_idsel && board_pci_idsel(device, 1) == 0) { + *data = 0xffffffff; + local_irq_restore(flags); + return -1; } - /* setup the config window */ - if (bus->number == 0) { - cfg_base = ((1<number<<16) | (device<<11); - } + /* Setup the config window */ + if (bus->number == 0) + cfg_base = (1 << device) << 11; + else + cfg_base = 0x80000000 | (bus->number << 16) | (device << 11); - /* setup the lower bits of the 36 bit address */ - offset = (function << 8) | (where & ~0x3); - /* pick up any address that falls below the page mask */ + /* Setup the lower bits of the 36-bit address */ + offset = (function << 8) | (where & ~0x3); + /* Pick up any address that falls below the page mask */ offset |= cfg_base & ~PAGE_MASK; - /* page boundary */ + /* Page boundary */ cfg_base = cfg_base & PAGE_MASK; - entryLo0 = (6 << 26) | (cfg_base >> 6) | (2 << 3) | 7; - entryLo1 = (6 << 26) | (cfg_base >> 6) | (0x1000 >> 6) | (2 << 3) | 7; - + /* + * To improve performance, if the current device is the same as + * the last device accessed, we don't touch the TLB. + */ + entryLo0 = (6 << 26) | (cfg_base >> 6) | (2 << 3) | 7; + entryLo1 = (6 << 26) | (cfg_base >> 6) | (0x1000 >> 6) | (2 << 3) | 7; if ((entryLo0 != last_entryLo0) || (entryLo1 != last_entryLo1)) { mod_wired_entry(pci_cfg_wired_entry, entryLo0, entryLo1, (unsigned long)pci_cfg_vm->addr, PM_4K); @@ -154,38 +149,37 @@ static int config_access(unsigned char access_type, struct pci_bus *bus, last_entryLo1 = entryLo1; } - if (access_type == PCI_ACCESS_WRITE) { + if (access_type == PCI_ACCESS_WRITE) au_writel(*data, (int)(pci_cfg_vm->addr + offset)); - } else { + else *data = au_readl((int)(pci_cfg_vm->addr + offset)); - } + au_sync_udelay(2); - DBG("cfg_access %d bus->number %d dev %d at %x *data %x conf %x\n", - access_type, bus->number, device, where, *data, offset); + DBG("cfg_access %d bus->number %u dev %u at %x *data %x conf %lx\n", + access_type, bus->number, device, where, *data, offset); - /* check master abort */ + /* Check master abort */ status = au_readl(Au1500_PCI_STATCMD); - if (status & (1<<29)) { + if (status & (1 << 29)) { *data = 0xffffffff; error = -1; DBG("Au1x Master Abort\n"); } else if ((status >> 28) & 0xf) { - DBG("PCI ERR detected: device %d, status %x\n", device, ((status >> 28) & 0xf)); + DBG("PCI ERR detected: device %u, status %lx\n", + device, (status >> 28) & 0xf); - /* clear errors */ + /* Clear errors */ au_writel(status & 0xf000ffff, Au1500_PCI_STATCMD); *data = 0xffffffff; error = -1; } - /* Take away the idsel. - */ - if (board_pci_idsel) { + /* Take away the IDSEL. */ + if (board_pci_idsel) (void)board_pci_idsel(device, 0); - } local_irq_restore(flags); return error; @@ -193,7 +187,7 @@ static int config_access(unsigned char access_type, struct pci_bus *bus, } static int read_config_byte(struct pci_bus *bus, unsigned int devfn, - int where, u8 * val) + int where, u8 *val) { u32 data; int ret; @@ -207,9 +201,8 @@ static int read_config_byte(struct pci_bus *bus, unsigned int devfn, return ret; } - static int read_config_word(struct pci_bus *bus, unsigned int devfn, - int where, u16 * val) + int where, u16 *val) { u32 data; int ret; @@ -222,7 +215,7 @@ static int read_config_word(struct pci_bus *bus, unsigned int devfn, } static int read_config_dword(struct pci_bus *bus, unsigned int devfn, - int where, u32 * val) + int where, u32 *val) { int ret; @@ -230,9 +223,8 @@ static int read_config_dword(struct pci_bus *bus, unsigned int devfn, return ret; } -static int -write_config_byte(struct pci_bus *bus, unsigned int devfn, int where, - u8 val) +static int write_config_byte(struct pci_bus *bus, unsigned int devfn, + int where, u8 val) { u32 data = 0; @@ -240,7 +232,7 @@ write_config_byte(struct pci_bus *bus, unsigned int devfn, int where, return -1; data = (data & ~(0xff << ((where & 3) << 3))) | - (val << ((where & 3) << 3)); + (val << ((where & 3) << 3)); if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data)) return -1; @@ -248,9 +240,8 @@ write_config_byte(struct pci_bus *bus, unsigned int devfn, int where, return PCIBIOS_SUCCESSFUL; } -static int -write_config_word(struct pci_bus *bus, unsigned int devfn, int where, - u16 val) +static int write_config_word(struct pci_bus *bus, unsigned int devfn, + int where, u16 val) { u32 data = 0; @@ -258,18 +249,16 @@ write_config_word(struct pci_bus *bus, unsigned int devfn, int where, return -1; data = (data & ~(0xffff << ((where & 3) << 3))) | - (val << ((where & 3) << 3)); + (val << ((where & 3) << 3)); if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data)) return -1; - return PCIBIOS_SUCCESSFUL; } -static int -write_config_dword(struct pci_bus *bus, unsigned int devfn, int where, - u32 val) +static int write_config_dword(struct pci_bus *bus, unsigned int devfn, + int where, u32 val) { if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &val)) return -1; @@ -278,18 +267,20 @@ write_config_dword(struct pci_bus *bus, unsigned int devfn, int where, } static int config_read(struct pci_bus *bus, unsigned int devfn, - int where, int size, u32 * val) + int where, int size, u32 *val) { switch (size) { case 1: { u8 _val; int rc = read_config_byte(bus, devfn, where, &_val); + *val = _val; return rc; } - case 2: { + case 2: { u16 _val; int rc = read_config_word(bus, devfn, where, &_val); + *val = _val; return rc; } @@ -311,7 +302,6 @@ static int config_write(struct pci_bus *bus, unsigned int devfn, } } - struct pci_ops au1x_pci_ops = { config_read, config_write