X-Git-Url: http://pilppa.org/gitweb/gitweb.cgi?a=blobdiff_plain;f=arch%2Fpowerpc%2FKconfig.debug;h=db7cc34c24d4d983030adeebb029be70925587e3;hb=f374ada53bd1ca7c16d7607369fccc6769704956;hp=6a79fe43e229e9036a25b8792eb45246f44db30c;hpb=af76bbabbdf5cebea6a3863446f9f74b469c4bdc;p=linux-2.6-omap-h63xx.git diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug index 6a79fe43e22..db7cc34c24d 100644 --- a/arch/powerpc/Kconfig.debug +++ b/arch/powerpc/Kconfig.debug @@ -151,6 +151,13 @@ config BOOTX_TEXT config PPC_EARLY_DEBUG bool "Early debugging (dangerous)" + help + Say Y to enable some early debugging facilities that may be available + for your processor/board combination. Those facilities are hacks + intended to debug problems early during boot, this should not be + enabled in a production kernel. + Note that enabling this will also cause the kernel default log level + to be pushed to max automatically very early during boot choice prompt "Early debugging console" @@ -218,7 +225,16 @@ config PPC_EARLY_DEBUG_44x depends on 44x help Select this to enable early debugging for IBM 44x chips via the - inbuilt serial port. + inbuilt serial port. If you enable this, ensure you set + PPC_EARLY_DEBUG_44x_PHYSLOW below to suit your target board. + +config PPC_EARLY_DEBUG_40x + bool "Early serial debugging for IBM/AMCC 40x CPUs" + depends on 40x + help + Select this to enable early debugging for IBM 40x chips via the + inbuilt serial port. This works on chips with a 16550 compatible + UART. Xilinx chips with uartlite cannot use this option. config PPC_EARLY_DEBUG_CPM bool "Early serial debugging for Freescale CPM-based serial ports" @@ -235,12 +251,20 @@ config PPC_EARLY_DEBUG_44x_PHYSLOW hex "Low 32 bits of early debug UART physical address" depends on PPC_EARLY_DEBUG_44x default "0x40000200" + help + You probably want 0x40000200 for ebony boards and + 0x40000300 for taishan config PPC_EARLY_DEBUG_44x_PHYSHIGH hex "EPRN of early debug UART physical address" depends on PPC_EARLY_DEBUG_44x default "0x1" +config PPC_EARLY_DEBUG_40x_PHYSADDR + hex "Early debug UART physical address" + depends on PPC_EARLY_DEBUG_40x + default "0xef600300" + config PPC_EARLY_DEBUG_CPM_ADDR hex "CPM UART early debug transmit descriptor address" depends on PPC_EARLY_DEBUG_CPM