X-Git-Url: http://pilppa.org/gitweb/gitweb.cgi?a=blobdiff_plain;f=arch%2Fpowerpc%2Fboot%2Fdts%2Fmpc8540ads.dts;h=9568bfaff8f74aab49f18c3526edbfa5655b9a13;hb=9a5467fd600669cda488771dac3e951034fe2b08;hp=6442a717ec3bf7532477372b9fd74b5f8a92d167;hpb=70f227d8846a8a9b1f36f71c42e11cc7c6e9408d;p=linux-2.6-omap-h63xx.git diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts index 6442a717ec3..9568bfaff8f 100644 --- a/arch/powerpc/boot/dts/mpc8540ads.dts +++ b/arch/powerpc/boot/dts/mpc8540ads.dts @@ -1,7 +1,7 @@ /* * MPC8540 ADS Device Tree Source * - * Copyright 2006 Freescale Semiconductor Inc. + * Copyright 2006, 2008 Freescale Semiconductor Inc. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -9,6 +9,7 @@ * option) any later version. */ +/dts-v1/; / { model = "MPC8540ADS"; @@ -16,258 +17,292 @@ #address-cells = <1>; #size-cells = <1>; + aliases { + ethernet0 = &enet0; + ethernet1 = &enet1; + ethernet2 = &enet2; + serial0 = &serial0; + serial1 = &serial1; + pci0 = &pci0; + }; + cpus { #address-cells = <1>; #size-cells = <0>; PowerPC,8540@0 { device_type = "cpu"; - reg = <0>; - d-cache-line-size = <20>; // 32 bytes - i-cache-line-size = <20>; // 32 bytes - d-cache-size = <8000>; // L1, 32K - i-cache-size = <8000>; // L1, 32K + reg = <0x0>; + d-cache-line-size = <32>; // 32 bytes + i-cache-line-size = <32>; // 32 bytes + d-cache-size = <0x8000>; // L1, 32K + i-cache-size = <0x8000>; // L1, 32K timebase-frequency = <0>; // 33 MHz, from uboot bus-frequency = <0>; // 166 MHz clock-frequency = <0>; // 825 MHz, from uboot + next-level-cache = <&L2>; }; }; memory { device_type = "memory"; - reg = <00000000 08000000>; // 128M at 0x0 + reg = <0x0 0x8000000>; // 128M at 0x0 }; soc8540@e0000000 { #address-cells = <1>; #size-cells = <1>; device_type = "soc"; - ranges = <0 e0000000 00100000>; - reg = ; // CCSRBAR 1M + compatible = "simple-bus"; + ranges = <0x0 0xe0000000 0x100000>; + reg = <0xe0000000 0x100000>; // CCSRBAR 1M bus-frequency = <0>; memory-controller@2000 { compatible = "fsl,8540-memory-controller"; - reg = <2000 1000>; + reg = <0x2000 0x1000>; interrupt-parent = <&mpic>; - interrupts = <12 2>; + interrupts = <18 2>; }; - l2-cache-controller@20000 { + L2: l2-cache-controller@20000 { compatible = "fsl,8540-l2-cache-controller"; - reg = <20000 1000>; - cache-line-size = <20>; // 32 bytes - cache-size = <40000>; // L2, 256K + reg = <0x20000 0x1000>; + cache-line-size = <32>; // 32 bytes + cache-size = <0x40000>; // L2, 256K interrupt-parent = <&mpic>; - interrupts = <10 2>; + interrupts = <16 2>; }; i2c@3000 { - device_type = "i2c"; + #address-cells = <1>; + #size-cells = <0>; + cell-index = <0>; compatible = "fsl-i2c"; - reg = <3000 100>; - interrupts = <2b 2>; + reg = <0x3000 0x100>; + interrupts = <43 2>; interrupt-parent = <&mpic>; dfsrr; }; + dma@21300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma"; + reg = <0x21300 0x4>; + ranges = <0x0 0x21100 0x200>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8540-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupt-parent = <&mpic>; + interrupts = <20 2>; + }; + dma-channel@80 { + compatible = "fsl,mpc8540-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupt-parent = <&mpic>; + interrupts = <21 2>; + }; + dma-channel@100 { + compatible = "fsl,mpc8540-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupt-parent = <&mpic>; + interrupts = <22 2>; + }; + dma-channel@180 { + compatible = "fsl,mpc8540-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupt-parent = <&mpic>; + interrupts = <23 2>; + }; + }; + mdio@24520 { #address-cells = <1>; #size-cells = <0>; - device_type = "mdio"; - compatible = "gianfar"; - reg = <24520 20>; + compatible = "fsl,gianfar-mdio"; + reg = <0x24520 0x20>; + phy0: ethernet-phy@0 { interrupt-parent = <&mpic>; interrupts = <5 1>; - reg = <0>; + reg = <0x0>; device_type = "ethernet-phy"; }; phy1: ethernet-phy@1 { interrupt-parent = <&mpic>; interrupts = <5 1>; - reg = <1>; + reg = <0x1>; device_type = "ethernet-phy"; }; phy3: ethernet-phy@3 { interrupt-parent = <&mpic>; interrupts = <7 1>; - reg = <3>; + reg = <0x3>; device_type = "ethernet-phy"; }; }; - ethernet@24000 { - #address-cells = <1>; - #size-cells = <0>; + enet0: ethernet@24000 { + cell-index = <0>; device_type = "network"; model = "TSEC"; compatible = "gianfar"; - reg = <24000 1000>; - /* - * address is deprecated and will be removed - * in 2.6.25. Only recent versions of - * U-Boot support local-mac-address, however. - */ - address = [ 00 00 00 00 00 00 ]; + reg = <0x24000 0x1000>; local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <1d 2 1e 2 22 2>; + interrupts = <29 2 30 2 34 2>; interrupt-parent = <&mpic>; phy-handle = <&phy0>; }; - ethernet@25000 { - #address-cells = <1>; - #size-cells = <0>; + enet1: ethernet@25000 { + cell-index = <1>; device_type = "network"; model = "TSEC"; compatible = "gianfar"; - reg = <25000 1000>; - /* - * address is deprecated and will be removed - * in 2.6.25. Only recent versions of - * U-Boot support local-mac-address, however. - */ - address = [ 00 00 00 00 00 00 ]; + reg = <0x25000 0x1000>; local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <23 2 24 2 28 2>; + interrupts = <35 2 36 2 40 2>; interrupt-parent = <&mpic>; phy-handle = <&phy1>; }; - ethernet@26000 { - #address-cells = <1>; - #size-cells = <0>; + enet2: ethernet@26000 { + cell-index = <2>; device_type = "network"; model = "FEC"; compatible = "gianfar"; - reg = <26000 1000>; - /* - * address is deprecated and will be removed - * in 2.6.25. Only recent versions of - * U-Boot support local-mac-address, however. - */ - address = [ 00 00 00 00 00 00 ]; + reg = <0x26000 0x1000>; local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2>; + interrupts = <41 2>; interrupt-parent = <&mpic>; phy-handle = <&phy3>; }; - serial@4500 { + serial0: serial@4500 { + cell-index = <0>; device_type = "serial"; compatible = "ns16550"; - reg = <4500 100>; // reg base, size + reg = <0x4500 0x100>; // reg base, size clock-frequency = <0>; // should we fill in in uboot? - interrupts = <2a 2>; + interrupts = <42 2>; interrupt-parent = <&mpic>; }; - serial@4600 { + serial1: serial@4600 { + cell-index = <1>; device_type = "serial"; compatible = "ns16550"; - reg = <4600 100>; // reg base, size + reg = <0x4600 0x100>; // reg base, size clock-frequency = <0>; // should we fill in in uboot? - interrupts = <2a 2>; + interrupts = <42 2>; interrupt-parent = <&mpic>; }; mpic: pic@40000 { - clock-frequency = <0>; interrupt-controller; #address-cells = <0>; #interrupt-cells = <2>; - reg = <40000 40000>; + reg = <0x40000 0x40000>; compatible = "chrp,open-pic"; device_type = "open-pic"; - big-endian; }; }; - pci@e0008000 { - interrupt-map-mask = ; + pci0: pci@e0008000 { + cell-index = <0>; + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; interrupt-map = < /* IDSEL 0x02 */ - 1000 0 0 1 &mpic 1 1 - 1000 0 0 2 &mpic 2 1 - 1000 0 0 3 &mpic 3 1 - 1000 0 0 4 &mpic 4 1 + 0x1000 0x0 0x0 0x1 &mpic 0x1 0x1 + 0x1000 0x0 0x0 0x2 &mpic 0x2 0x1 + 0x1000 0x0 0x0 0x3 &mpic 0x3 0x1 + 0x1000 0x0 0x0 0x4 &mpic 0x4 0x1 /* IDSEL 0x03 */ - 1800 0 0 1 &mpic 4 1 - 1800 0 0 2 &mpic 1 1 - 1800 0 0 3 &mpic 2 1 - 1800 0 0 4 &mpic 3 1 + 0x1800 0x0 0x0 0x1 &mpic 0x4 0x1 + 0x1800 0x0 0x0 0x2 &mpic 0x1 0x1 + 0x1800 0x0 0x0 0x3 &mpic 0x2 0x1 + 0x1800 0x0 0x0 0x4 &mpic 0x3 0x1 /* IDSEL 0x04 */ - 2000 0 0 1 &mpic 3 1 - 2000 0 0 2 &mpic 4 1 - 2000 0 0 3 &mpic 1 1 - 2000 0 0 4 &mpic 2 1 + 0x2000 0x0 0x0 0x1 &mpic 0x3 0x1 + 0x2000 0x0 0x0 0x2 &mpic 0x4 0x1 + 0x2000 0x0 0x0 0x3 &mpic 0x1 0x1 + 0x2000 0x0 0x0 0x4 &mpic 0x2 0x1 /* IDSEL 0x05 */ - 2800 0 0 1 &mpic 2 1 - 2800 0 0 2 &mpic 3 1 - 2800 0 0 3 &mpic 4 1 - 2800 0 0 4 &mpic 1 1 + 0x2800 0x0 0x0 0x1 &mpic 0x2 0x1 + 0x2800 0x0 0x0 0x2 &mpic 0x3 0x1 + 0x2800 0x0 0x0 0x3 &mpic 0x4 0x1 + 0x2800 0x0 0x0 0x4 &mpic 0x1 0x1 /* IDSEL 0x0c */ - 6000 0 0 1 &mpic 1 1 - 6000 0 0 2 &mpic 2 1 - 6000 0 0 3 &mpic 3 1 - 6000 0 0 4 &mpic 4 1 + 0x6000 0x0 0x0 0x1 &mpic 0x1 0x1 + 0x6000 0x0 0x0 0x2 &mpic 0x2 0x1 + 0x6000 0x0 0x0 0x3 &mpic 0x3 0x1 + 0x6000 0x0 0x0 0x4 &mpic 0x4 0x1 /* IDSEL 0x0d */ - 6800 0 0 1 &mpic 4 1 - 6800 0 0 2 &mpic 1 1 - 6800 0 0 3 &mpic 2 1 - 6800 0 0 4 &mpic 3 1 + 0x6800 0x0 0x0 0x1 &mpic 0x4 0x1 + 0x6800 0x0 0x0 0x2 &mpic 0x1 0x1 + 0x6800 0x0 0x0 0x3 &mpic 0x2 0x1 + 0x6800 0x0 0x0 0x4 &mpic 0x3 0x1 /* IDSEL 0x0e */ - 7000 0 0 1 &mpic 3 1 - 7000 0 0 2 &mpic 4 1 - 7000 0 0 3 &mpic 1 1 - 7000 0 0 4 &mpic 2 1 + 0x7000 0x0 0x0 0x1 &mpic 0x3 0x1 + 0x7000 0x0 0x0 0x2 &mpic 0x4 0x1 + 0x7000 0x0 0x0 0x3 &mpic 0x1 0x1 + 0x7000 0x0 0x0 0x4 &mpic 0x2 0x1 /* IDSEL 0x0f */ - 7800 0 0 1 &mpic 2 1 - 7800 0 0 2 &mpic 3 1 - 7800 0 0 3 &mpic 4 1 - 7800 0 0 4 &mpic 1 1 + 0x7800 0x0 0x0 0x1 &mpic 0x2 0x1 + 0x7800 0x0 0x0 0x2 &mpic 0x3 0x1 + 0x7800 0x0 0x0 0x3 &mpic 0x4 0x1 + 0x7800 0x0 0x0 0x4 &mpic 0x1 0x1 /* IDSEL 0x12 */ - 9000 0 0 1 &mpic 1 1 - 9000 0 0 2 &mpic 2 1 - 9000 0 0 3 &mpic 3 1 - 9000 0 0 4 &mpic 4 1 + 0x9000 0x0 0x0 0x1 &mpic 0x1 0x1 + 0x9000 0x0 0x0 0x2 &mpic 0x2 0x1 + 0x9000 0x0 0x0 0x3 &mpic 0x3 0x1 + 0x9000 0x0 0x0 0x4 &mpic 0x4 0x1 /* IDSEL 0x13 */ - 9800 0 0 1 &mpic 4 1 - 9800 0 0 2 &mpic 1 1 - 9800 0 0 3 &mpic 2 1 - 9800 0 0 4 &mpic 3 1 + 0x9800 0x0 0x0 0x1 &mpic 0x4 0x1 + 0x9800 0x0 0x0 0x2 &mpic 0x1 0x1 + 0x9800 0x0 0x0 0x3 &mpic 0x2 0x1 + 0x9800 0x0 0x0 0x4 &mpic 0x3 0x1 /* IDSEL 0x14 */ - a000 0 0 1 &mpic 3 1 - a000 0 0 2 &mpic 4 1 - a000 0 0 3 &mpic 1 1 - a000 0 0 4 &mpic 2 1 + 0xa000 0x0 0x0 0x1 &mpic 0x3 0x1 + 0xa000 0x0 0x0 0x2 &mpic 0x4 0x1 + 0xa000 0x0 0x0 0x3 &mpic 0x1 0x1 + 0xa000 0x0 0x0 0x4 &mpic 0x2 0x1 /* IDSEL 0x15 */ - a800 0 0 1 &mpic 2 1 - a800 0 0 2 &mpic 3 1 - a800 0 0 3 &mpic 4 1 - a800 0 0 4 &mpic 1 1>; + 0xa800 0x0 0x0 0x1 &mpic 0x2 0x1 + 0xa800 0x0 0x0 0x2 &mpic 0x3 0x1 + 0xa800 0x0 0x0 0x3 &mpic 0x4 0x1 + 0xa800 0x0 0x0 0x4 &mpic 0x1 0x1>; interrupt-parent = <&mpic>; - interrupts = <18 2>; + interrupts = <24 2>; bus-range = <0 0>; - ranges = <02000000 0 80000000 80000000 0 20000000 - 01000000 0 00000000 e2000000 0 00100000>; - clock-frequency = <3f940aa>; + ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000 + 0x1000000 0x0 0x0 0xe2000000 0x0 0x100000>; + clock-frequency = <66666666>; #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; - reg = ; + reg = <0xe0008000 0x1000>; compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; device_type = "pci"; };