X-Git-Url: http://pilppa.org/gitweb/gitweb.cgi?a=blobdiff_plain;f=arch%2Fsparc64%2Fkernel%2Fpci_sun4v_asm.S;h=ecb81f389b0689ff3518448813a1532e96e50af5;hb=35437b6192d9a4eb92f095dfd72396b6d2970f0b;hp=6604fdbf746cc44b2c410013563a87e27ae84ee3;hpb=52aef8183fbedb0232b20127b089e85e7aa095e3;p=linux-2.6-omap-h63xx.git diff --git a/arch/sparc64/kernel/pci_sun4v_asm.S b/arch/sparc64/kernel/pci_sun4v_asm.S index 6604fdbf746..ecb81f389b0 100644 --- a/arch/sparc64/kernel/pci_sun4v_asm.S +++ b/arch/sparc64/kernel/pci_sun4v_asm.S @@ -93,3 +93,269 @@ pci_sun4v_config_put: mov -1, %o1 1: retl mov %o1, %o0 + + /* %o0: devhandle + * %o1: msiqid + * %o2: msiq phys address + * %o3: num entries + * + * returns %o0: status + * + * status will be zero if the operation completed + * successfully, else -1 if not + */ + .globl pci_sun4v_msiq_conf +pci_sun4v_msiq_conf: + mov HV_FAST_PCI_MSIQ_CONF, %o5 + ta HV_FAST_TRAP + retl + mov %o0, %o0 + + /* %o0: devhandle + * %o1: msiqid + * %o2: &msiq_phys_addr + * %o3: &msiq_num_entries + * + * returns %o0: status + */ + .globl pci_sun4v_msiq_info +pci_sun4v_msiq_info: + mov %o2, %o4 + mov HV_FAST_PCI_MSIQ_INFO, %o5 + ta HV_FAST_TRAP + stx %o1, [%o4] + stx %o2, [%o3] + retl + mov %o0, %o0 + + /* %o0: devhandle + * %o1: msiqid + * %o2: &valid + * + * returns %o0: status + */ + .globl pci_sun4v_msiq_getvalid +pci_sun4v_msiq_getvalid: + mov HV_FAST_PCI_MSIQ_GETVALID, %o5 + ta HV_FAST_TRAP + stx %o1, [%o2] + retl + mov %o0, %o0 + + /* %o0: devhandle + * %o1: msiqid + * %o2: valid + * + * returns %o0: status + */ + .globl pci_sun4v_msiq_setvalid +pci_sun4v_msiq_setvalid: + mov HV_FAST_PCI_MSIQ_SETVALID, %o5 + ta HV_FAST_TRAP + retl + mov %o0, %o0 + + /* %o0: devhandle + * %o1: msiqid + * %o2: &state + * + * returns %o0: status + */ + .globl pci_sun4v_msiq_getstate +pci_sun4v_msiq_getstate: + mov HV_FAST_PCI_MSIQ_GETSTATE, %o5 + ta HV_FAST_TRAP + stx %o1, [%o2] + retl + mov %o0, %o0 + + /* %o0: devhandle + * %o1: msiqid + * %o2: state + * + * returns %o0: status + */ + .globl pci_sun4v_msiq_setstate +pci_sun4v_msiq_setstate: + mov HV_FAST_PCI_MSIQ_SETSTATE, %o5 + ta HV_FAST_TRAP + retl + mov %o0, %o0 + + /* %o0: devhandle + * %o1: msiqid + * %o2: &head + * + * returns %o0: status + */ + .globl pci_sun4v_msiq_gethead +pci_sun4v_msiq_gethead: + mov HV_FAST_PCI_MSIQ_GETHEAD, %o5 + ta HV_FAST_TRAP + stx %o1, [%o2] + retl + mov %o0, %o0 + + /* %o0: devhandle + * %o1: msiqid + * %o2: head + * + * returns %o0: status + */ + .globl pci_sun4v_msiq_sethead +pci_sun4v_msiq_sethead: + mov HV_FAST_PCI_MSIQ_SETHEAD, %o5 + ta HV_FAST_TRAP + retl + mov %o0, %o0 + + /* %o0: devhandle + * %o1: msiqid + * %o2: &tail + * + * returns %o0: status + */ + .globl pci_sun4v_msiq_gettail +pci_sun4v_msiq_gettail: + mov HV_FAST_PCI_MSIQ_GETTAIL, %o5 + ta HV_FAST_TRAP + stx %o1, [%o2] + retl + mov %o0, %o0 + + /* %o0: devhandle + * %o1: msinum + * %o2: &valid + * + * returns %o0: status + */ + .globl pci_sun4v_msi_getvalid +pci_sun4v_msi_getvalid: + mov HV_FAST_PCI_MSI_GETVALID, %o5 + ta HV_FAST_TRAP + stx %o1, [%o2] + retl + mov %o0, %o0 + + /* %o0: devhandle + * %o1: msinum + * %o2: valid + * + * returns %o0: status + */ + .globl pci_sun4v_msi_setvalid +pci_sun4v_msi_setvalid: + mov HV_FAST_PCI_MSI_SETVALID, %o5 + ta HV_FAST_TRAP + retl + mov %o0, %o0 + + /* %o0: devhandle + * %o1: msinum + * %o2: &msiq + * + * returns %o0: status + */ + .globl pci_sun4v_msi_getmsiq +pci_sun4v_msi_getmsiq: + mov HV_FAST_PCI_MSI_GETMSIQ, %o5 + ta HV_FAST_TRAP + stx %o1, [%o2] + retl + mov %o0, %o0 + + /* %o0: devhandle + * %o1: msinum + * %o2: msitype + * %o3: msiq + * + * returns %o0: status + */ + .globl pci_sun4v_msi_setmsiq +pci_sun4v_msi_setmsiq: + mov HV_FAST_PCI_MSI_SETMSIQ, %o5 + ta HV_FAST_TRAP + retl + mov %o0, %o0 + + /* %o0: devhandle + * %o1: msinum + * %o2: &state + * + * returns %o0: status + */ + .globl pci_sun4v_msi_getstate +pci_sun4v_msi_getstate: + mov HV_FAST_PCI_MSI_GETSTATE, %o5 + ta HV_FAST_TRAP + stx %o1, [%o2] + retl + mov %o0, %o0 + + /* %o0: devhandle + * %o1: msinum + * %o2: state + * + * returns %o0: status + */ + .globl pci_sun4v_msi_setstate +pci_sun4v_msi_setstate: + mov HV_FAST_PCI_MSI_SETSTATE, %o5 + ta HV_FAST_TRAP + retl + mov %o0, %o0 + + /* %o0: devhandle + * %o1: msinum + * %o2: &msiq + * + * returns %o0: status + */ + .globl pci_sun4v_msg_getmsiq +pci_sun4v_msg_getmsiq: + mov HV_FAST_PCI_MSG_GETMSIQ, %o5 + ta HV_FAST_TRAP + stx %o1, [%o2] + retl + mov %o0, %o0 + + /* %o0: devhandle + * %o1: msinum + * %o2: msiq + * + * returns %o0: status + */ + .globl pci_sun4v_msg_setmsiq +pci_sun4v_msg_setmsiq: + mov HV_FAST_PCI_MSG_SETMSIQ, %o5 + ta HV_FAST_TRAP + retl + mov %o0, %o0 + + /* %o0: devhandle + * %o1: msinum + * %o2: &valid + * + * returns %o0: status + */ + .globl pci_sun4v_msg_getvalid +pci_sun4v_msg_getvalid: + mov HV_FAST_PCI_MSG_GETVALID, %o5 + ta HV_FAST_TRAP + stx %o1, [%o2] + retl + mov %o0, %o0 + + /* %o0: devhandle + * %o1: msinum + * %o2: valid + * + * returns %o0: status + */ + .globl pci_sun4v_msg_setvalid +pci_sun4v_msg_setvalid: + mov HV_FAST_PCI_MSG_SETVALID, %o5 + ta HV_FAST_TRAP + retl + mov %o0, %o0 +