X-Git-Url: http://pilppa.org/gitweb/gitweb.cgi?a=blobdiff_plain;f=drivers%2Fata%2Fpata_ali.c;h=ab44d18850f6eed706b0576624c8d92359ef13e0;hb=b7a01e723c9edaefcadb99d42c1409371c01dde1;hp=d25563794c8da39deb211970e334f4b7fe2b9a7e;hpb=2eab80ac0c96fb98267afeb12a4899801564c75b;p=linux-2.6-omap-h63xx.git diff --git a/drivers/ata/pata_ali.c b/drivers/ata/pata_ali.c index d25563794c8..ab44d18850f 100644 --- a/drivers/ata/pata_ali.c +++ b/drivers/ata/pata_ali.c @@ -34,7 +34,7 @@ #include #define DRV_NAME "pata_ali" -#define DRV_VERSION "0.7.1" +#define DRV_VERSION "0.7.2" /* * Cable special cases @@ -153,11 +153,11 @@ static void ali_early_error_handler(struct ata_port *ap) static unsigned long ali_20_filter(const struct ata_port *ap, struct ata_device *adev, unsigned long mask) { - char model_num[40]; + char model_num[ATA_ID_PROD_LEN + 1]; /* No DMA on anything but a disk for now */ if (adev->class != ATA_DEV_ATA) mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); - ata_id_string(adev->id, model_num, ATA_ID_PROD_OFS, sizeof(model_num)); + ata_id_c_string(adev->id, model_num, ATA_ID_PROD, sizeof(model_num)); if (strstr(model_num, "WDC")) return mask &= ~ATA_MASK_UDMA; return ata_pci_default_filter(ap, adev, mask); @@ -370,14 +370,14 @@ static struct ata_port_operations ali_early_port_ops = { .qc_prep = ata_qc_prep, .qc_issue = ata_qc_issue_prot, - .data_xfer = ata_pio_data_xfer, + .data_xfer = ata_data_xfer, .irq_handler = ata_interrupt, .irq_clear = ata_bmdma_irq_clear, + .irq_on = ata_irq_on, + .irq_ack = ata_irq_ack, .port_start = ata_port_start, - .port_stop = ata_port_stop, - .host_stop = ata_host_stop }; /* @@ -411,14 +411,14 @@ static struct ata_port_operations ali_20_port_ops = { .qc_prep = ata_qc_prep, .qc_issue = ata_qc_issue_prot, - .data_xfer = ata_pio_data_xfer, + .data_xfer = ata_data_xfer, .irq_handler = ata_interrupt, .irq_clear = ata_bmdma_irq_clear, + .irq_on = ata_irq_on, + .irq_ack = ata_irq_ack, .port_start = ata_port_start, - .port_stop = ata_port_stop, - .host_stop = ata_host_stop }; /* @@ -449,14 +449,14 @@ static struct ata_port_operations ali_c2_port_ops = { .qc_prep = ata_qc_prep, .qc_issue = ata_qc_issue_prot, - .data_xfer = ata_pio_data_xfer, + .data_xfer = ata_data_xfer, .irq_handler = ata_interrupt, .irq_clear = ata_bmdma_irq_clear, + .irq_on = ata_irq_on, + .irq_ack = ata_irq_ack, .port_start = ata_port_start, - .port_stop = ata_port_stop, - .host_stop = ata_host_stop }; /* @@ -486,14 +486,14 @@ static struct ata_port_operations ali_c5_port_ops = { .qc_prep = ata_qc_prep, .qc_issue = ata_qc_issue_prot, - .data_xfer = ata_pio_data_xfer, + .data_xfer = ata_data_xfer, .irq_handler = ata_interrupt, .irq_clear = ata_bmdma_irq_clear, + .irq_on = ata_irq_on, + .irq_ack = ata_irq_ack, .port_start = ata_port_start, - .port_stop = ata_port_stop, - .host_stop = ata_host_stop }; @@ -504,7 +504,7 @@ static struct ata_port_operations ali_c5_port_ops = { * Perform the setup on the device that must be done both at boot * and at resume time. */ - + static void ali_init_chipset(struct pci_dev *pdev) { u8 rev, tmp; @@ -528,7 +528,7 @@ static void ali_init_chipset(struct pci_dev *pdev) pci_read_config_byte(pdev, 0x4B, &tmp); pci_write_config_byte(pdev, 0x4B, tmp | 0x08); } - north = pci_get_slot(pdev->bus, PCI_DEVFN(0,0)); + north = pci_get_bus_and_slot(0, PCI_DEVFN(0,0)); isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL); if (north && north->vendor == PCI_VENDOR_ID_AL && isa_bridge) { @@ -537,7 +537,7 @@ static void ali_init_chipset(struct pci_dev *pdev) pci_read_config_byte(isa_bridge, 0x79, &tmp); if (rev == 0xC2) pci_write_config_byte(isa_bridge, 0x79, tmp | 0x04); - else if (rev > 0xC2) + else if (rev > 0xC2 && rev < 0xC5) pci_write_config_byte(isa_bridge, 0x79, tmp | 0x02); } if (rev >= 0x20) { @@ -655,7 +655,7 @@ static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id) port_info[0] = port_info[1] = &info_c5; ali_init_chipset(pdev); - + isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL); if (isa_bridge && rev >= 0x20 && rev < 0xC2) { /* Are we paired with a UDMA capable chip */