X-Git-Url: http://pilppa.org/gitweb/gitweb.cgi?a=blobdiff_plain;f=drivers%2Fchar%2Fip2%2Fi2ellis.c;h=3601017f58cfdd936b490fc69936ab2973a864f5;hb=2106b531eaa2edd0c2dfa735a0556c08c7ba3c86;hp=61ef013b84457887fdf803c0e70fe75b713ff6fb;hpb=5e16e3f0e24dadb79b96b6134cd3303f0d42f0c5;p=linux-2.6-omap-h63xx.git diff --git a/drivers/char/ip2/i2ellis.c b/drivers/char/ip2/i2ellis.c index 61ef013b844..3601017f58c 100644 --- a/drivers/char/ip2/i2ellis.c +++ b/drivers/char/ip2/i2ellis.c @@ -53,7 +53,7 @@ static int ii2Safe; // Safe I/O address for delay routine static int iiDelayed; // Set when the iiResetDelay function is // called. Cleared when ANY board is reset. -static rwlock_t Dl_spinlock; +static DEFINE_RWLOCK(Dl_spinlock); //******** //* Code * @@ -82,7 +82,6 @@ static rwlock_t Dl_spinlock; static void iiEllisInit(void) { - LOCK_INIT(&Dl_spinlock); } //****************************************************************************** @@ -132,7 +131,7 @@ iiSetAddress( i2eBordStrPtr pB, int address, delayFunc_t delay ) || (address & 0x7) ) { - COMPLETE(pB,I2EE_BADADDR); + I2_COMPLETE(pB, I2EE_BADADDR); } // Initialize accelerators @@ -152,7 +151,7 @@ iiSetAddress( i2eBordStrPtr pB, int address, delayFunc_t delay ) pB->i2eValid = I2E_MAGIC; pB->i2eState = II_STATE_COLD; - COMPLETE(pB, I2EE_GOOD); + I2_COMPLETE(pB, I2EE_GOOD); } //****************************************************************************** @@ -177,12 +176,12 @@ iiReset(i2eBordStrPtr pB) // Magic number should be set, else even the address is suspect if (pB->i2eValid != I2E_MAGIC) { - COMPLETE(pB, I2EE_BADMAGIC); + I2_COMPLETE(pB, I2EE_BADMAGIC); } - OUTB(pB->i2eBase + FIFO_RESET, 0); // Any data will do + outb(0, pB->i2eBase + FIFO_RESET); /* Any data will do */ iiDelay(pB, 50); // Pause between resets - OUTB(pB->i2eBase + FIFO_RESET, 0); // Second reset + outb(0, pB->i2eBase + FIFO_RESET); /* Second reset */ // We must wait before even attempting to read anything from the FIFO: the // board's P.O.S.T may actually attempt to read and write its end of the @@ -203,7 +202,7 @@ iiReset(i2eBordStrPtr pB) // Ensure anything which would have been of use to standard loadware is // blanked out, since board has now forgotten everything!. - pB->i2eUsingIrq = IRQ_UNDEFINED; // Not set up to use an interrupt yet + pB->i2eUsingIrq = I2_IRQ_UNDEFINED; /* to not use an interrupt so far */ pB->i2eWaitingForEmptyFifo = 0; pB->i2eOutMailWaiting = 0; pB->i2eChannelPtr = NULL; @@ -215,7 +214,7 @@ iiReset(i2eBordStrPtr pB) pB->i2eFatalTrap = NULL; pB->i2eFatal = 0; - COMPLETE(pB, I2EE_GOOD); + I2_COMPLETE(pB, I2EE_GOOD); } //****************************************************************************** @@ -235,14 +234,14 @@ static int iiResetDelay(i2eBordStrPtr pB) { if (pB->i2eValid != I2E_MAGIC) { - COMPLETE(pB, I2EE_BADMAGIC); + I2_COMPLETE(pB, I2EE_BADMAGIC); } if (pB->i2eState != II_STATE_RESET) { - COMPLETE(pB, I2EE_BADSTATE); + I2_COMPLETE(pB, I2EE_BADSTATE); } iiDelay(pB,2000); /* Now we wait for two seconds. */ iiDelayed = 1; /* Delay has been called: ok to initialize */ - COMPLETE(pB, I2EE_GOOD); + I2_COMPLETE(pB, I2EE_GOOD); } //****************************************************************************** @@ -273,12 +272,12 @@ iiInitialize(i2eBordStrPtr pB) if (pB->i2eValid != I2E_MAGIC) { - COMPLETE(pB, I2EE_BADMAGIC); + I2_COMPLETE(pB, I2EE_BADMAGIC); } if (pB->i2eState != II_STATE_RESET || !iiDelayed) { - COMPLETE(pB, I2EE_BADSTATE); + I2_COMPLETE(pB, I2EE_BADSTATE); } // In case there is a failure short of our completely reading the power-up @@ -291,13 +290,12 @@ iiInitialize(i2eBordStrPtr pB) for (itemp = 0; itemp < sizeof(porStr); itemp++) { // We expect the entire message is ready. - if (HAS_NO_INPUT(pB)) - { + if (!I2_HAS_INPUT(pB)) { pB->i2ePomSize = itemp; - COMPLETE(pB, I2EE_PORM_SHORT); + I2_COMPLETE(pB, I2EE_PORM_SHORT); } - pB->i2ePom.c[itemp] = c = BYTE_FROM(pB); + pB->i2ePom.c[itemp] = c = inb(pB->i2eData); // We check the magic numbers as soon as they are supposed to be read // (rather than after) to minimize effect of reading something we @@ -306,22 +304,22 @@ iiInitialize(i2eBordStrPtr pB) (itemp == POR_2_INDEX && c != POR_MAGIC_2)) { pB->i2ePomSize = itemp+1; - COMPLETE(pB, I2EE_BADMAGIC); + I2_COMPLETE(pB, I2EE_BADMAGIC); } } pB->i2ePomSize = itemp; // Ensure that this was all the data... - if (HAS_INPUT(pB)) - COMPLETE(pB, I2EE_PORM_LONG); + if (I2_HAS_INPUT(pB)) + I2_COMPLETE(pB, I2EE_PORM_LONG); // For now, we'll fail to initialize if P.O.S.T reports bad chip mapper: // Implying we will not be able to download any code either: That's ok: the // condition is pretty explicit. if (pB->i2ePom.e.porDiag1 & POR_BAD_MAPPER) { - COMPLETE(pB, I2EE_POSTERR); + I2_COMPLETE(pB, I2EE_POSTERR); } // Determine anything which must be done differently depending on the family @@ -332,7 +330,7 @@ iiInitialize(i2eBordStrPtr pB) pB->i2eFifoStyle = FIFO_II; pB->i2eFifoSize = 512; // 512 bytes, always - pB->i2eDataWidth16 = NO; + pB->i2eDataWidth16 = false; pB->i2eMaxIrq = 15; // Because board cannot tell us it is in an 8-bit // slot, we do allow it to be done (documentation!) @@ -354,7 +352,7 @@ iiInitialize(i2eBordStrPtr pB) // should always be consistent for IntelliPort-II. Ditto below... if (pB->i2ePom.e.porPorts1 != 4) { - COMPLETE(pB, I2EE_INCONSIST); + I2_COMPLETE(pB, I2EE_INCONSIST); } break; @@ -364,7 +362,7 @@ iiInitialize(i2eBordStrPtr pB) pB->i2eChannelMap[0] = 0xff; // Eight port if (pB->i2ePom.e.porPorts1 != 8) { - COMPLETE(pB, I2EE_INCONSIST); + I2_COMPLETE(pB, I2EE_INCONSIST); } break; @@ -373,7 +371,7 @@ iiInitialize(i2eBordStrPtr pB) pB->i2eChannelMap[0] = 0x3f; // Six Port if (pB->i2ePom.e.porPorts1 != 6) { - COMPLETE(pB, I2EE_INCONSIST); + I2_COMPLETE(pB, I2EE_INCONSIST); } break; } @@ -402,7 +400,7 @@ iiInitialize(i2eBordStrPtr pB) if (itemp < 8 || itemp > 15) { - COMPLETE(pB, I2EE_INCONSIST); + I2_COMPLETE(pB, I2EE_INCONSIST); } pB->i2eFifoSize = (1 << itemp); @@ -450,26 +448,26 @@ iiInitialize(i2eBordStrPtr pB) switch (pB->i2ePom.e.porBus & (POR_BUS_SLOT16 | POR_BUS_DIP16) ) { case POR_BUS_SLOT16 | POR_BUS_DIP16: - pB->i2eDataWidth16 = YES; + pB->i2eDataWidth16 = true; pB->i2eMaxIrq = 15; break; case POR_BUS_SLOT16: - pB->i2eDataWidth16 = NO; + pB->i2eDataWidth16 = false; pB->i2eMaxIrq = 15; break; case 0: case POR_BUS_DIP16: // In an 8-bit slot, DIP switch don't care. default: - pB->i2eDataWidth16 = NO; + pB->i2eDataWidth16 = false; pB->i2eMaxIrq = 7; break; } break; // POR_ID_FIIEX case default: // Unknown type of board - COMPLETE(pB, I2EE_BAD_FAMILY); + I2_COMPLETE(pB, I2EE_BAD_FAMILY); break; } // End the switch based on family @@ -483,17 +481,14 @@ iiInitialize(i2eBordStrPtr pB) { case POR_BUS_T_ISA: case POR_BUS_T_UNK: // If the type of bus is undeclared, assume ok. - pB->i2eChangeIrq = YES; - break; case POR_BUS_T_MCA: case POR_BUS_T_EISA: - pB->i2eChangeIrq = NO; break; default: - COMPLETE(pB, I2EE_BADBUS); + I2_COMPLETE(pB, I2EE_BADBUS); } - if (pB->i2eDataWidth16 == YES) + if (pB->i2eDataWidth16) { pB->i2eWriteBuf = iiWriteBuf16; pB->i2eReadBuf = iiReadBuf16; @@ -529,7 +524,7 @@ iiInitialize(i2eBordStrPtr pB) break; default: - COMPLETE(pB, I2EE_INCONSIST); + I2_COMPLETE(pB, I2EE_INCONSIST); } // Initialize state information. @@ -549,7 +544,7 @@ iiInitialize(i2eBordStrPtr pB) // Everything is ok now, return with good status/ pB->i2eValid = I2E_MAGIC; - COMPLETE(pB, I2EE_GOOD); + I2_COMPLETE(pB, I2EE_GOOD); } //****************************************************************************** @@ -658,7 +653,7 @@ ii2DelayIO(unsigned int mseconds) while(mseconds--) { int i = ii2DelValue; while ( i-- ) { - INB ( ii2Safe ); + inb(ii2Safe); } } } @@ -709,11 +704,11 @@ iiWriteBuf16(i2eBordStrPtr pB, unsigned char *address, int count) { // Rudimentary sanity checking here. if (pB->i2eValid != I2E_MAGIC) - COMPLETE(pB, I2EE_INVALID); + I2_COMPLETE(pB, I2EE_INVALID); - OUTSW ( pB->i2eData, address, count); + I2_OUTSW(pB->i2eData, address, count); - COMPLETE(pB, I2EE_GOOD); + I2_COMPLETE(pB, I2EE_GOOD); } //****************************************************************************** @@ -738,11 +733,11 @@ iiWriteBuf8(i2eBordStrPtr pB, unsigned char *address, int count) { /* Rudimentary sanity checking here */ if (pB->i2eValid != I2E_MAGIC) - COMPLETE(pB, I2EE_INVALID); + I2_COMPLETE(pB, I2EE_INVALID); - OUTSB ( pB->i2eData, address, count ); + I2_OUTSB(pB->i2eData, address, count); - COMPLETE(pB, I2EE_GOOD); + I2_COMPLETE(pB, I2EE_GOOD); } //****************************************************************************** @@ -767,11 +762,11 @@ iiReadBuf16(i2eBordStrPtr pB, unsigned char *address, int count) { // Rudimentary sanity checking here. if (pB->i2eValid != I2E_MAGIC) - COMPLETE(pB, I2EE_INVALID); + I2_COMPLETE(pB, I2EE_INVALID); - INSW ( pB->i2eData, address, count); + I2_INSW(pB->i2eData, address, count); - COMPLETE(pB, I2EE_GOOD); + I2_COMPLETE(pB, I2EE_GOOD); } //****************************************************************************** @@ -796,11 +791,11 @@ iiReadBuf8(i2eBordStrPtr pB, unsigned char *address, int count) { // Rudimentary sanity checking here. if (pB->i2eValid != I2E_MAGIC) - COMPLETE(pB, I2EE_INVALID); + I2_COMPLETE(pB, I2EE_INVALID); - INSB ( pB->i2eData, address, count); + I2_INSB(pB->i2eData, address, count); - COMPLETE(pB, I2EE_GOOD); + I2_COMPLETE(pB, I2EE_GOOD); } //****************************************************************************** @@ -820,7 +815,7 @@ iiReadBuf8(i2eBordStrPtr pB, unsigned char *address, int count) static unsigned short iiReadWord16(i2eBordStrPtr pB) { - return (unsigned short)( INW(pB->i2eData) ); + return inw(pB->i2eData); } //****************************************************************************** @@ -842,9 +837,9 @@ iiReadWord8(i2eBordStrPtr pB) { unsigned short urs; - urs = INB ( pB->i2eData ); + urs = inb(pB->i2eData); - return ( ( INB ( pB->i2eData ) << 8 ) | urs ); + return (inb(pB->i2eData) << 8) | urs; } //****************************************************************************** @@ -865,7 +860,7 @@ iiReadWord8(i2eBordStrPtr pB) static void iiWriteWord16(i2eBordStrPtr pB, unsigned short value) { - WORD_TO(pB, (int)value); + outw((int)value, pB->i2eData); } //****************************************************************************** @@ -886,8 +881,8 @@ iiWriteWord16(i2eBordStrPtr pB, unsigned short value) static void iiWriteWord8(i2eBordStrPtr pB, unsigned short value) { - BYTE_TO(pB, (char)value); - BYTE_TO(pB, (char)(value >> 8) ); + outb((char)value, pB->i2eData); + outb((char)(value >> 8), pB->i2eData); } //****************************************************************************** @@ -939,30 +934,30 @@ iiWaitForTxEmptyII(i2eBordStrPtr pB, int mSdelay) // interrupts of any kind. - WRITE_LOCK_IRQSAVE(&Dl_spinlock,flags) - OUTB(pB->i2ePointer, SEL_COMMAND); - OUTB(pB->i2ePointer, SEL_CMD_SH); + write_lock_irqsave(&Dl_spinlock, flags); + outb(SEL_COMMAND, pB->i2ePointer); + outb(SEL_CMD_SH, pB->i2ePointer); - itemp = INB(pB->i2eStatus); + itemp = inb(pB->i2eStatus); - OUTB(pB->i2ePointer, SEL_COMMAND); - OUTB(pB->i2ePointer, SEL_CMD_UNSH); + outb(SEL_COMMAND, pB->i2ePointer); + outb(SEL_CMD_UNSH, pB->i2ePointer); if (itemp & ST_IN_EMPTY) { - UPDATE_FIFO_ROOM(pB); - WRITE_UNLOCK_IRQRESTORE(&Dl_spinlock,flags) - COMPLETE(pB, I2EE_GOOD); + I2_UPDATE_FIFO_ROOM(pB); + write_unlock_irqrestore(&Dl_spinlock, flags); + I2_COMPLETE(pB, I2EE_GOOD); } - WRITE_UNLOCK_IRQRESTORE(&Dl_spinlock,flags) + write_unlock_irqrestore(&Dl_spinlock, flags); if (mSdelay-- == 0) break; iiDelay(pB, 1); /* 1 mS granularity on checking condition */ } - COMPLETE(pB, I2EE_TXE_TIME); + I2_COMPLETE(pB, I2EE_TXE_TIME); } //****************************************************************************** @@ -1002,21 +997,21 @@ iiWaitForTxEmptyIIEX(i2eBordStrPtr pB, int mSdelay) // you will generally not want to service interrupts or in any way // disrupt the assumptions implicit in the larger context. - WRITE_LOCK_IRQSAVE(&Dl_spinlock,flags) + write_lock_irqsave(&Dl_spinlock, flags); - if (INB(pB->i2eStatus) & STE_OUT_MT) { - UPDATE_FIFO_ROOM(pB); - WRITE_UNLOCK_IRQRESTORE(&Dl_spinlock,flags) - COMPLETE(pB, I2EE_GOOD); + if (inb(pB->i2eStatus) & STE_OUT_MT) { + I2_UPDATE_FIFO_ROOM(pB); + write_unlock_irqrestore(&Dl_spinlock, flags); + I2_COMPLETE(pB, I2EE_GOOD); } - WRITE_UNLOCK_IRQRESTORE(&Dl_spinlock,flags) + write_unlock_irqrestore(&Dl_spinlock, flags); if (mSdelay-- == 0) break; iiDelay(pB, 1); // 1 mS granularity on checking condition } - COMPLETE(pB, I2EE_TXE_TIME); + I2_COMPLETE(pB, I2EE_TXE_TIME); } //****************************************************************************** @@ -1038,8 +1033,8 @@ static int iiTxMailEmptyII(i2eBordStrPtr pB) { int port = pB->i2ePointer; - OUTB ( port, SEL_OUTMAIL ); - return ( INB(port) == 0 ); + outb(SEL_OUTMAIL, port); + return inb(port) == 0; } //****************************************************************************** @@ -1060,7 +1055,7 @@ iiTxMailEmptyII(i2eBordStrPtr pB) static int iiTxMailEmptyIIEX(i2eBordStrPtr pB) { - return !(INB(pB->i2eStatus) & STE_OUT_MAIL); + return !(inb(pB->i2eStatus) & STE_OUT_MAIL); } //****************************************************************************** @@ -1084,10 +1079,10 @@ iiTrySendMailII(i2eBordStrPtr pB, unsigned char mail) { int port = pB->i2ePointer; - OUTB(port, SEL_OUTMAIL); - if (INB(port) == 0) { - OUTB(port, SEL_OUTMAIL); - OUTB(port, mail); + outb(SEL_OUTMAIL, port); + if (inb(port) == 0) { + outb(SEL_OUTMAIL, port); + outb(mail, port); return 1; } return 0; @@ -1112,10 +1107,9 @@ iiTrySendMailII(i2eBordStrPtr pB, unsigned char mail) static int iiTrySendMailIIEX(i2eBordStrPtr pB, unsigned char mail) { - if(INB(pB->i2eStatus) & STE_OUT_MAIL) { + if (inb(pB->i2eStatus) & STE_OUT_MAIL) return 0; - } - OUTB(pB->i2eXMail, mail); + outb(mail, pB->i2eXMail); return 1; } @@ -1136,9 +1130,9 @@ iiTrySendMailIIEX(i2eBordStrPtr pB, unsigned char mail) static unsigned short iiGetMailII(i2eBordStrPtr pB) { - if (HAS_MAIL(pB)) { - OUTB(pB->i2ePointer, SEL_INMAIL); - return INB(pB->i2ePointer); + if (I2_HAS_MAIL(pB)) { + outb(SEL_INMAIL, pB->i2ePointer); + return inb(pB->i2ePointer); } else { return NO_MAIL_HERE; } @@ -1161,11 +1155,10 @@ iiGetMailII(i2eBordStrPtr pB) static unsigned short iiGetMailIIEX(i2eBordStrPtr pB) { - if (HAS_MAIL(pB)) { - return INB(pB->i2eXMail); - } else { + if (I2_HAS_MAIL(pB)) + return inb(pB->i2eXMail); + else return NO_MAIL_HERE; - } } //****************************************************************************** @@ -1184,8 +1177,8 @@ iiGetMailIIEX(i2eBordStrPtr pB) static void iiEnableMailIrqII(i2eBordStrPtr pB) { - OUTB(pB->i2ePointer, SEL_MASK); - OUTB(pB->i2ePointer, ST_IN_MAIL); + outb(SEL_MASK, pB->i2ePointer); + outb(ST_IN_MAIL, pB->i2ePointer); } //****************************************************************************** @@ -1204,7 +1197,7 @@ iiEnableMailIrqII(i2eBordStrPtr pB) static void iiEnableMailIrqIIEX(i2eBordStrPtr pB) { - OUTB(pB->i2eXMask, MX_IN_MAIL); + outb(MX_IN_MAIL, pB->i2eXMask); } //****************************************************************************** @@ -1223,8 +1216,8 @@ iiEnableMailIrqIIEX(i2eBordStrPtr pB) static void iiWriteMaskII(i2eBordStrPtr pB, unsigned char value) { - OUTB(pB->i2ePointer, SEL_MASK); - OUTB(pB->i2ePointer, value); + outb(SEL_MASK, pB->i2ePointer); + outb(value, pB->i2ePointer); } //****************************************************************************** @@ -1243,7 +1236,7 @@ iiWriteMaskII(i2eBordStrPtr pB, unsigned char value) static void iiWriteMaskIIEX(i2eBordStrPtr pB, unsigned char value) { - OUTB(pB->i2eXMask, value); + outb(value, pB->i2eXMask); } //****************************************************************************** @@ -1354,9 +1347,8 @@ iiDownloadBlock ( i2eBordStrPtr pB, loadHdrStrPtr pSource, int isStandard) // immediately and be harmless, though not strictly necessary. itemp = MAX_DLOAD_ACK_TIME/10; while (--itemp) { - if (HAS_INPUT(pB)) { - switch(BYTE_FROM(pB)) - { + if (I2_HAS_INPUT(pB)) { + switch (inb(pB->i2eData)) { case LOADWARE_OK: pB->i2eState = isStandard ? II_STATE_STDLOADED :II_STATE_LOADED;