X-Git-Url: http://pilppa.org/gitweb/gitweb.cgi?a=blobdiff_plain;f=drivers%2Fide%2Fpci%2Fatiixp.c;h=8b637181681ad2d6d4cfcbf30c39d6e6044b9bc6;hb=5b0504c0d795d6b0a904ff861c043d7a231f67a4;hp=446900da1329a6af1eb92e70f66959386947ad4c;hpb=2b0460b534f383eca744eb8fff66ec9f57e702b9;p=linux-2.6-omap-h63xx.git diff --git a/drivers/ide/pci/atiixp.c b/drivers/ide/pci/atiixp.c index 446900da132..8b637181681 100644 --- a/drivers/ide/pci/atiixp.c +++ b/drivers/ide/pci/atiixp.c @@ -1,6 +1,4 @@ /* - * linux/drivers/ide/pci/atiixp.c Version 0.03 Aug 3 2007 - * * Copyright (C) 2003 ATI Inc. * Copyright (C) 2004,2007 Bartlomiej Zolnierkiewicz */ @@ -8,15 +6,11 @@ #include #include #include -#include #include #include #include -#include #include -#include - #define ATIIXP_IDE_PIO_TIMING 0x40 #define ATIIXP_IDE_MDMA_TIMING 0x44 #define ATIIXP_IDE_PIO_CONTROL 0x48 @@ -43,47 +37,8 @@ static atiixp_ide_timing mdma_timing[] = { { 0x02, 0x00 }, }; -static int save_mdma_mode[4]; - static DEFINE_SPINLOCK(atiixp_lock); -static void atiixp_dma_host_on(ide_drive_t *drive) -{ - struct pci_dev *dev = drive->hwif->pci_dev; - unsigned long flags; - u16 tmp16; - - spin_lock_irqsave(&atiixp_lock, flags); - - pci_read_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, &tmp16); - if (save_mdma_mode[drive->dn]) - tmp16 &= ~(1 << drive->dn); - else - tmp16 |= (1 << drive->dn); - pci_write_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, tmp16); - - spin_unlock_irqrestore(&atiixp_lock, flags); - - ide_dma_host_on(drive); -} - -static void atiixp_dma_host_off(ide_drive_t *drive) -{ - struct pci_dev *dev = drive->hwif->pci_dev; - unsigned long flags; - u16 tmp16; - - spin_lock_irqsave(&atiixp_lock, flags); - - pci_read_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, &tmp16); - tmp16 &= ~(1 << drive->dn); - pci_write_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, tmp16); - - spin_unlock_irqrestore(&atiixp_lock, flags); - - ide_dma_host_off(drive); -} - /** * atiixp_set_pio_mode - set host controller for PIO mode * @drive: drive @@ -94,7 +49,7 @@ static void atiixp_dma_host_off(ide_drive_t *drive) static void atiixp_set_pio_mode(ide_drive_t *drive, const u8 pio) { - struct pci_dev *dev = drive->hwif->pci_dev; + struct pci_dev *dev = to_pci_dev(drive->hwif->dev); unsigned long flags; int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8; u32 pio_timing_data; @@ -127,94 +82,77 @@ static void atiixp_set_pio_mode(ide_drive_t *drive, const u8 pio) static void atiixp_set_dma_mode(ide_drive_t *drive, const u8 speed) { - struct pci_dev *dev = drive->hwif->pci_dev; + struct pci_dev *dev = to_pci_dev(drive->hwif->dev); unsigned long flags; int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8; u32 tmp32; u16 tmp16; - - if (speed < XFER_MW_DMA_0) - return; + u16 udma_ctl = 0; spin_lock_irqsave(&atiixp_lock, flags); - save_mdma_mode[drive->dn] = 0; + pci_read_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, &udma_ctl); + if (speed >= XFER_UDMA_0) { pci_read_config_word(dev, ATIIXP_IDE_UDMA_MODE, &tmp16); tmp16 &= ~(0x07 << (drive->dn * 4)); tmp16 |= ((speed & 0x07) << (drive->dn * 4)); pci_write_config_word(dev, ATIIXP_IDE_UDMA_MODE, tmp16); - } else { - if ((speed >= XFER_MW_DMA_0) && (speed <= XFER_MW_DMA_2)) { - save_mdma_mode[drive->dn] = speed; - pci_read_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, &tmp32); - tmp32 &= ~(0xff << timing_shift); - tmp32 |= (mdma_timing[speed & 0x03].recover_width << timing_shift) | - (mdma_timing[speed & 0x03].command_width << (timing_shift + 4)); - pci_write_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, tmp32); - } - } - spin_unlock_irqrestore(&atiixp_lock, flags); -} + udma_ctl |= (1 << drive->dn); + } else if (speed >= XFER_MW_DMA_0) { + u8 i = speed & 0x03; -/** - * init_hwif_atiixp - fill in the hwif for the ATIIXP - * @hwif: IDE interface - * - * Set up the ide_hwif_t for the ATIIXP interface according to the - * capabilities of the hardware. - */ + pci_read_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, &tmp32); + tmp32 &= ~(0xff << timing_shift); + tmp32 |= (mdma_timing[i].recover_width << timing_shift) | + (mdma_timing[i].command_width << (timing_shift + 4)); + pci_write_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, tmp32); -static void __devinit init_hwif_atiixp(ide_hwif_t *hwif) -{ - u8 udma_mode = 0; - u8 ch = hwif->channel; - struct pci_dev *pdev = hwif->pci_dev; - - if (!hwif->irq) - hwif->irq = ch ? 15 : 14; + udma_ctl &= ~(1 << drive->dn); + } - hwif->set_pio_mode = &atiixp_set_pio_mode; - hwif->set_dma_mode = &atiixp_set_dma_mode; - hwif->drives[0].autotune = 1; - hwif->drives[1].autotune = 1; + pci_write_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, udma_ctl); - if (!hwif->dma_base) - return; + spin_unlock_irqrestore(&atiixp_lock, flags); +} - hwif->atapi_dma = 1; - hwif->ultra_mask = 0x3f; - hwif->mwdma_mask = 0x07; +static u8 __devinit atiixp_cable_detect(ide_hwif_t *hwif) +{ + struct pci_dev *pdev = to_pci_dev(hwif->dev); + u8 udma_mode = 0, ch = hwif->channel; pci_read_config_byte(pdev, ATIIXP_IDE_UDMA_MODE + ch, &udma_mode); if ((udma_mode & 0x07) >= 0x04 || (udma_mode & 0x70) >= 0x40) - hwif->cbl = ATA_CBL_PATA80; + return ATA_CBL_PATA80; else - hwif->cbl = ATA_CBL_PATA40; - - hwif->dma_host_on = &atiixp_dma_host_on; - hwif->dma_host_off = &atiixp_dma_host_off; + return ATA_CBL_PATA40; } +static const struct ide_port_ops atiixp_port_ops = { + .set_pio_mode = atiixp_set_pio_mode, + .set_dma_mode = atiixp_set_dma_mode, + .cable_detect = atiixp_cable_detect, +}; -static ide_pci_device_t atiixp_pci_info[] __devinitdata = { +static const struct ide_port_info atiixp_pci_info[] __devinitdata = { { /* 0 */ .name = "ATIIXP", - .init_hwif = init_hwif_atiixp, - .autodma = AUTODMA, .enablebits = {{0x48,0x01,0x00}, {0x48,0x08,0x00}}, - .bootable = ON_BOARD, + .port_ops = &atiixp_port_ops, + .host_flags = IDE_HFLAG_LEGACY_IRQS, .pio_mask = ATA_PIO4, + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA5, },{ /* 1 */ .name = "SB600_PATA", - .init_hwif = init_hwif_atiixp, - .autodma = AUTODMA, .enablebits = {{0x48,0x01,0x00}, {0x00,0x00,0x00}}, - .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_SINGLE, + .port_ops = &atiixp_port_ops, + .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_LEGACY_IRQS, .pio_mask = ATA_PIO4, + .mwdma_mask = ATA_MWDMA2, + .udma_mask = ATA_UDMA5, }, };