X-Git-Url: http://pilppa.org/gitweb/gitweb.cgi?a=blobdiff_plain;f=drivers%2Fide%2Fpci%2Fcy82c693.c;h=e14ad5530fa4b0c1e1369387d43e4e73d8ac8b7b;hb=713a590dea9a61e84f2837e75c5e9429d95908b5;hp=1cd4e9cb0521d0532bc24c21c21506d348b3df9c;hpb=03bbe082cffc4533f6557bf23f0c672307067246;p=linux-2.6-omap-h63xx.git diff --git a/drivers/ide/pci/cy82c693.c b/drivers/ide/pci/cy82c693.c index 1cd4e9cb052..e14ad5530fa 100644 --- a/drivers/ide/pci/cy82c693.c +++ b/drivers/ide/pci/cy82c693.c @@ -1,6 +1,4 @@ /* - * linux/drivers/ide/pci/cy82c693.c Version 0.42 Oct 23, 2007 - * * Copyright (C) 1998-2000 Andreas S. Krebs (akrebs@altavista.net), Maintainer * Copyright (C) 1998-2002 Andre Hedrick , Integrator * @@ -8,7 +6,7 @@ * * The CY82C693 chipset is used on Digital's PC-Alpha 164SX boards. * Writing the driver was quite simple, since most of the job is - * done by the generic pci-ide support. + * done by the generic pci-ide support. * The hard part was finding the CY82C693's datasheet on Cypress's * web page :-(. But Altavista solved this problem :-). * @@ -17,12 +15,10 @@ * - I recently got a 16.8G IBM DTTA, so I was able to test it with * a large and fast disk - the results look great, so I'd say the * driver is working fine :-) - * hdparm -t reports 8.17 MB/sec at about 6% CPU usage for the DTTA - * - this is my first linux driver, so there's probably a lot of room + * hdparm -t reports 8.17 MB/sec at about 6% CPU usage for the DTTA + * - this is my first linux driver, so there's probably a lot of room * for optimizations and bug fixing, so feel free to do it. - * - use idebus=xx parameter to set PCI bus speed - needed to calc - * timings for PIO modes (default will be 40) - * - if using PIO mode it's a good idea to set the PIO mode and + * - if using PIO mode it's a good idea to set the PIO mode and * 32-bit I/O support (if possible), e.g. hdparm -p2 -c1 /dev/hda * - I had some problems with my IBM DHEA with PIO modes < 2 * (lost interrupts) ????? @@ -47,7 +43,6 @@ #include #include #include -#include #include #include @@ -113,11 +108,11 @@ typedef struct pio_clocks_s { * calc clocks using bus_speed * returns (rounded up) time in bus clocks for time in ns */ -static int calc_clk (int time, int bus_speed) +static int calc_clk(int time, int bus_speed) { int clocks; - clocks = (time*bus_speed+999)/1000 -1; + clocks = (time*bus_speed+999)/1000 - 1; if (clocks < 0) clocks = 0; @@ -135,33 +130,32 @@ static int calc_clk (int time, int bus_speed) * NOTE: for mode 0,1 and 2 drives 8-bit IDE command control registers are used * for mode 3 and 4 drives 8 and 16-bit timings are the same * - */ -static void compute_clocks (u8 pio, pio_clocks_t *p_pclk) + */ +static void compute_clocks(u8 pio, pio_clocks_t *p_pclk) { + struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio); int clk1, clk2; - int bus_speed = system_bus_clock(); /* get speed of PCI bus */ + int bus_speed = ide_pci_clk ? ide_pci_clk : 33; /* we don't check against CY82C693's min and max speed, * so you can play with the idebus=xx parameter */ /* let's calc the address setup time clocks */ - p_pclk->address_time = (u8)calc_clk(ide_pio_timings[pio].setup_time, bus_speed); + p_pclk->address_time = (u8)calc_clk(t->setup, bus_speed); /* let's calc the active and recovery time clocks */ - clk1 = calc_clk(ide_pio_timings[pio].active_time, bus_speed); + clk1 = calc_clk(t->active, bus_speed); /* calc recovery timing */ - clk2 = ide_pio_timings[pio].cycle_time - - ide_pio_timings[pio].active_time - - ide_pio_timings[pio].setup_time; + clk2 = t->cycle - t->active - t->setup; clk2 = calc_clk(clk2, bus_speed); clk1 = (clk1<<4)|clk2; /* combine active and recovery clocks */ /* note: we use the same values for 16bit IOR and IOW - * those are all the same, since I don't have other + * those are all the same, since I don't have other * timings than those from ide-lib.c */ @@ -176,17 +170,12 @@ static void compute_clocks (u8 pio, pio_clocks_t *p_pclk) * set DMA mode a specific channel for CY82C693 */ -static void cy82c693_dma_enable (ide_drive_t *drive, int mode, int single) +static void cy82c693_set_dma_mode(ide_drive_t *drive, const u8 mode) { - u8 index = 0, data = 0; + ide_hwif_t *hwif = drive->hwif; + u8 single = (mode & 0x10) >> 4, index = 0, data = 0; - if (mode>2) /* make sure we set a valid mode */ - mode = 2; - - if (mode > drive->id->tDMA) /* to be absolutly sure we have a valid mode */ - mode = drive->id->tDMA; - - index = (HWIF(drive)->channel==0) ? CY82_INDEX_CHANNEL0 : CY82_INDEX_CHANNEL1; + index = hwif->channel ? CY82_INDEX_CHANNEL1 : CY82_INDEX_CHANNEL0; #if CY82C693_DEBUG_LOGS /* for debug let's show the previous values */ @@ -194,12 +183,12 @@ static void cy82c693_dma_enable (ide_drive_t *drive, int mode, int single) outb(index, CY82_INDEX_PORT); data = inb(CY82_DATA_PORT); - printk (KERN_INFO "%s (ch=%d, dev=%d): DMA mode is %d (single=%d)\n", + printk(KERN_INFO "%s (ch=%d, dev=%d): DMA mode is %d (single=%d)\n", drive->name, HWIF(drive)->channel, drive->select.b.unit, (data&0x3), ((data>>2)&1)); #endif /* CY82C693_DEBUG_LOGS */ - data = (u8)mode|(u8)(single<<2); + data = (mode & 3) | (single << 2); outb(index, CY82_INDEX_PORT); outb(data, CY82_DATA_PORT); @@ -207,10 +196,10 @@ static void cy82c693_dma_enable (ide_drive_t *drive, int mode, int single) #if CY82C693_DEBUG_INFO printk(KERN_INFO "%s (ch=%d, dev=%d): set DMA mode to %d (single=%d)\n", drive->name, HWIF(drive)->channel, drive->select.b.unit, - mode, single); + mode & 3, single); #endif /* CY82C693_DEBUG_INFO */ - /* + /* * note: below we set the value for Bus Master IDE TimeOut Register * I'm not absolutly sure what this does, but it solved my problem * with IDE DMA and sound, so I now can play sound and work with @@ -224,49 +213,16 @@ static void cy82c693_dma_enable (ide_drive_t *drive, int mode, int single) outb(CY82_INDEX_TIMEOUT, CY82_INDEX_PORT); outb(data, CY82_DATA_PORT); -#if CY82C693_DEBUG_INFO - printk (KERN_INFO "%s: Set IDE Bus Master TimeOut Register to 0x%X\n", - drive->name, data); -#endif /* CY82C693_DEBUG_INFO */ -} - -/* - * used to set DMA mode for CY82C693 (single and multi modes) - */ -static int cy82c693_ide_dma_on (ide_drive_t *drive) -{ - struct hd_driveid *id = drive->id; - #if CY82C693_DEBUG_INFO - printk (KERN_INFO "dma_on: %s\n", drive->name); + printk(KERN_INFO "%s: Set IDE Bus Master TimeOut Register to 0x%X\n", + drive->name, data); #endif /* CY82C693_DEBUG_INFO */ - - if (id != NULL) { - /* Enable DMA on any drive that has DMA - * (multi or single) enabled - */ - if (id->field_valid & 2) { /* regular DMA */ - int mmode, smode; - - mmode = id->dma_mword & (id->dma_mword >> 8); - smode = id->dma_1word & (id->dma_1word >> 8); - - if (mmode != 0) { - /* enable multi */ - cy82c693_dma_enable(drive, (mmode >> 1), 0); - } else if (smode != 0) { - /* enable single */ - cy82c693_dma_enable(drive, (smode >> 1), 1); - } - } - } - return __ide_dma_on(drive); } static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio) { ide_hwif_t *hwif = HWIF(drive); - struct pci_dev *dev = hwif->pci_dev; + struct pci_dev *dev = to_pci_dev(hwif->dev); pio_clocks_t pclk; unsigned int addrCtrl; @@ -283,14 +239,14 @@ static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio) #if CY82C693_DEBUG_LOGS /* for debug let's show the register values */ - - if (drive->select.b.unit == 0) { + + if (drive->select.b.unit == 0) { /* - * get master drive registers + * get master drive registers * address setup control register * is 32 bit !!! - */ - pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl); + */ + pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl); addrCtrl &= 0x0F; /* now let's get the remaining registers */ @@ -302,7 +258,7 @@ static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio) * set slave drive registers * address setup control register * is 32 bit !!! - */ + */ pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl); addrCtrl &= 0xF0; @@ -329,9 +285,9 @@ static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio) * set master drive * address setup control register * is 32 bit !!! - */ + */ pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl); - + addrCtrl &= (~0xF); addrCtrl |= (unsigned int)pclk.address_time; pci_write_config_dword(dev, CY82_IDE_ADDRSETUP, addrCtrl); @@ -340,14 +296,14 @@ static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio) pci_write_config_byte(dev, CY82_IDE_MASTER_IOR, pclk.time_16r); pci_write_config_byte(dev, CY82_IDE_MASTER_IOW, pclk.time_16w); pci_write_config_byte(dev, CY82_IDE_MASTER_8BIT, pclk.time_8); - + addrCtrl &= 0xF; } else { /* * set slave drive * address setup control register * is 32 bit !!! - */ + */ pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl); addrCtrl &= (~0xF0); @@ -361,7 +317,7 @@ static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio) addrCtrl >>= 4; addrCtrl &= 0xF; - } + } #if CY82C693_DEBUG_INFO printk(KERN_INFO "%s (ch=%d, dev=%d): set PIO timing to " @@ -381,41 +337,41 @@ static unsigned int __devinit init_chipset_cy82c693(struct pci_dev *dev, const c #ifdef CY82C693_SETDMA_CLOCK u8 data = 0; -#endif /* CY82C693_SETDMA_CLOCK */ +#endif /* CY82C693_SETDMA_CLOCK */ /* write info about this verion of the driver */ printk(KERN_INFO CY82_VERSION "\n"); #ifdef CY82C693_SETDMA_CLOCK /* okay let's set the DMA clock speed */ - - outb(CY82_INDEX_CTRLREG1, CY82_INDEX_PORT); - data = inb(CY82_DATA_PORT); + + outb(CY82_INDEX_CTRLREG1, CY82_INDEX_PORT); + data = inb(CY82_DATA_PORT); #if CY82C693_DEBUG_INFO printk(KERN_INFO "%s: Peripheral Configuration Register: 0x%X\n", name, data); #endif /* CY82C693_DEBUG_INFO */ - /* + /* * for some reason sometimes the DMA controller * speed is set to ATCLK/2 ???? - we fix this here - * + * * note: i don't know what causes this strange behaviour, * but even changing the dma speed doesn't solve it :-( - * the ide performance is still only half the normal speed - * + * the ide performance is still only half the normal speed + * * if anybody knows what goes wrong with my machine, please * let me know - ASK - */ + */ data |= 0x03; - outb(CY82_INDEX_CTRLREG1, CY82_INDEX_PORT); - outb(data, CY82_DATA_PORT); + outb(CY82_INDEX_CTRLREG1, CY82_INDEX_PORT); + outb(data, CY82_DATA_PORT); #if CY82C693_DEBUG_INFO - printk (KERN_INFO "%s: New Peripheral Configuration Register: 0x%X\n", + printk(KERN_INFO "%s: New Peripheral Configuration Register: 0x%X\n", name, data); #endif /* CY82C693_DEBUG_INFO */ @@ -423,24 +379,12 @@ static unsigned int __devinit init_chipset_cy82c693(struct pci_dev *dev, const c return 0; } -/* - * the init function - called for each ide channel once - */ -static void __devinit init_hwif_cy82c693(ide_hwif_t *hwif) -{ - hwif->set_pio_mode = &cy82c693_set_pio_mode; - - if (hwif->dma_base == 0) - return; - - hwif->ide_dma_on = &cy82c693_ide_dma_on; -} - static void __devinit init_iops_cy82c693(ide_hwif_t *hwif) { static ide_hwif_t *primary; + struct pci_dev *dev = to_pci_dev(hwif->dev); - if (PCI_FUNC(hwif->pci_dev->devfn) == 1) + if (PCI_FUNC(dev->devfn) == 1) primary = hwif; else { hwif->mate = primary; @@ -448,17 +392,21 @@ static void __devinit init_iops_cy82c693(ide_hwif_t *hwif) } } +static const struct ide_port_ops cy82c693_port_ops = { + .set_pio_mode = cy82c693_set_pio_mode, + .set_dma_mode = cy82c693_set_dma_mode, +}; + static const struct ide_port_info cy82c693_chipset __devinitdata = { .name = "CY82C693", .init_chipset = init_chipset_cy82c693, .init_iops = init_iops_cy82c693, - .init_hwif = init_hwif_cy82c693, + .port_ops = &cy82c693_port_ops, .chipset = ide_cy82c693, - .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_TRUST_BIOS_FOR_DMA | - IDE_HFLAG_BOOTABLE, + .host_flags = IDE_HFLAG_SINGLE, .pio_mask = ATA_PIO4, - .swdma_mask = ATA_SWDMA2_ONLY, - .mwdma_mask = ATA_MWDMA2_ONLY, + .swdma_mask = ATA_SWDMA2, + .mwdma_mask = ATA_MWDMA2, }; static int __devinit cy82c693_init_one(struct pci_dev *dev, const struct pci_device_id *id) @@ -468,7 +416,7 @@ static int __devinit cy82c693_init_one(struct pci_dev *dev, const struct pci_dev /* CY82C693 is more than only a IDE controller. Function 1 is primary IDE channel, function 2 - secondary. */ - if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && + if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && PCI_FUNC(dev->devfn) == 1) { dev2 = pci_get_slot(dev->bus, dev->devfn + 1); ret = ide_setup_pci_devices(dev, dev2, &cy82c693_chipset);