X-Git-Url: http://pilppa.org/gitweb/gitweb.cgi?a=blobdiff_plain;f=drivers%2Fide%2Fsl82c105.c;h=dba213c51baa98f293e007a6b69b3a87ccd1607a;hb=afd96668d8491f762e35c16ce65781da820a67fa;hp=6297956507c00fb7e3222070989f25cce9ba2000;hpb=de2cf591bc876f7a63809d8955855ab074588c30;p=linux-2.6-omap-h63xx.git

diff --git a/drivers/ide/sl82c105.c b/drivers/ide/sl82c105.c
index 6297956507c..dba213c51ba 100644
--- a/drivers/ide/sl82c105.c
+++ b/drivers/ide/sl82c105.c
@@ -271,7 +271,7 @@ static u8 sl82c105_bridge_revision(struct pci_dev *dev)
  * channel 0 here at least, but channel 1 has to be enabled by
  * firmware or arch code. We still set both to 16 bits mode.
  */
-static unsigned int init_chipset_sl82c105(struct pci_dev *dev)
+static int init_chipset_sl82c105(struct pci_dev *dev)
 {
 	u32 val;
 
@@ -281,7 +281,7 @@ static unsigned int init_chipset_sl82c105(struct pci_dev *dev)
 	val |= CTRL_P0EN | CTRL_P0F16 | CTRL_P1F16;
 	pci_write_config_dword(dev, 0x40, val);
 
-	return dev->irq;
+	return 0;
 }
 
 static const struct ide_port_ops sl82c105_port_ops = {