X-Git-Url: http://pilppa.org/gitweb/gitweb.cgi?a=blobdiff_plain;f=drivers%2Fmtd%2Fnand%2Fs3c2410.c;h=f3fa1be22ddf9e6e16805f3def5075e2bd18cc82;hb=1ff184225b15930ea118ac2130f074c741d34f08;hp=66f76e9618ddd9005edcb60faf2b66ea2ec539b2;hpb=37e58df30063e229ee5157f9d1c1fa1d749917c2;p=linux-2.6-omap-h63xx.git diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c index 66f76e9618d..f3fa1be22dd 100644 --- a/drivers/mtd/nand/s3c2410.c +++ b/drivers/mtd/nand/s3c2410.c @@ -8,7 +8,7 @@ * * Changelog: * 21-Sep-2004 BJD Initial version - * 23-Sep-2004 BJD Mulitple device support + * 23-Sep-2004 BJD Multiple device support * 28-Sep-2004 BJD Fixed ECC placement for Hardware mode * 12-Oct-2004 BJD Fixed errors in use of platform data * 18-Feb-2005 BJD Fix sparse errors @@ -120,6 +120,8 @@ struct s3c2410_nand_info { int sel_bit; int mtd_count; + unsigned long save_nfconf; + enum s3c_cpu_type cpu_type; }; @@ -364,23 +366,21 @@ static int s3c2410_nand_correct_data(struct mtd_info *mtd, u_char *dat, ((diff2 ^ (diff2 >> 1)) & 0x55) == 0x55) { /* calculate the bit position of the error */ - bit = (diff2 >> 2) & 1; - bit |= (diff2 >> 3) & 2; - bit |= (diff2 >> 4) & 4; + bit = ((diff2 >> 3) & 1) | + ((diff2 >> 4) & 2) | + ((diff2 >> 5) & 4); /* calculate the byte position of the error */ - byte = (diff1 << 1) & 0x80; - byte |= (diff1 << 2) & 0x40; - byte |= (diff1 << 3) & 0x20; - byte |= (diff1 << 4) & 0x10; - - byte |= (diff0 >> 3) & 0x08; - byte |= (diff0 >> 2) & 0x04; - byte |= (diff0 >> 1) & 0x02; - byte |= (diff0 >> 0) & 0x01; - - byte |= (diff2 << 8) & 0x100; + byte = ((diff2 << 7) & 0x100) | + ((diff1 << 0) & 0x80) | + ((diff1 << 1) & 0x40) | + ((diff1 << 2) & 0x20) | + ((diff1 << 3) & 0x10) | + ((diff0 >> 4) & 0x08) | + ((diff0 >> 3) & 0x04) | + ((diff0 >> 2) & 0x02) | + ((diff0 >> 1) & 0x01); dev_dbg(info->device, "correcting error bit %d, byte %d\n", bit, byte); @@ -399,7 +399,7 @@ static int s3c2410_nand_correct_data(struct mtd_info *mtd, u_char *dat, if ((diff0 & ~(1<save_nfconf = readl(info->regs + S3C2410_NFCONF); + + /* For the moment, we must ensure nFCE is high during + * the time we are suspended. This really should be + * handled by suspending the MTDs we are using, but + * that is currently not the case. */ + + writel(info->save_nfconf | info->sel_bit, + info->regs + S3C2410_NFCONF); + if (!allow_clk_stop(info)) clk_disable(info->clk); } @@ -820,11 +830,19 @@ static int s3c24xx_nand_suspend(struct platform_device *dev, pm_message_t pm) static int s3c24xx_nand_resume(struct platform_device *dev) { struct s3c2410_nand_info *info = platform_get_drvdata(dev); + unsigned long nfconf; if (info) { clk_enable(info->clk); s3c2410_nand_inithw(info, dev); + /* Restore the state of the nFCE line. */ + + nfconf = readl(info->regs + S3C2410_NFCONF); + nfconf &= ~info->sel_bit; + nfconf |= info->save_nfconf & info->sel_bit; + writel(nfconf, info->regs + S3C2410_NFCONF); + if (allow_clk_stop(info)) clk_disable(info->clk); } @@ -909,3 +927,6 @@ module_exit(s3c2410_nand_exit); MODULE_LICENSE("GPL"); MODULE_AUTHOR("Ben Dooks "); MODULE_DESCRIPTION("S3C24XX MTD NAND driver"); +MODULE_ALIAS("platform:s3c2410-nand"); +MODULE_ALIAS("platform:s3c2412-nand"); +MODULE_ALIAS("platform:s3c2440-nand");