X-Git-Url: http://pilppa.org/gitweb/gitweb.cgi?a=blobdiff_plain;f=drivers%2Fnet%2Fsmc91x.h;h=51d4134b37b196307bf98480fd786e64d983e897;hb=609eb39c8d8a8d2930780428f6cbe2f63eb84734;hp=af9e6bf595522d51fa14225a123b0549c4f17c67;hpb=541010e4b8921cd781ff02ae68028501457045b6;p=linux-2.6-omap-h63xx.git diff --git a/drivers/net/smc91x.h b/drivers/net/smc91x.h index af9e6bf5955..51d4134b37b 100644 --- a/drivers/net/smc91x.h +++ b/drivers/net/smc91x.h @@ -54,8 +54,9 @@ #define SMC_outw(v, a, r) writew(v, (a) + (r)) #define SMC_insw(a, r, p, l) readsw((a) + (r), p, l) #define SMC_outsw(a, r, p, l) writesw((a) + (r), p, l) +#define SMC_IRQ_FLAGS (-1) /* from resource */ -#elif defined(CONFIG_BFIN) +#elif defined(CONFIG_BLACKFIN) #define SMC_IRQ_FLAGS IRQF_TRIGGER_HIGH #define RPC_LSA_DEFAULT RPC_LED_100_10 @@ -158,7 +159,7 @@ #define SMC_outw(v, a, r) writew(v, (a) + (r)) #define SMC_outsw(a, r, p, l) writesw((a) + (r), p, l) -#define SMC_IRQ_FLAGS (0) +#define SMC_IRQ_FLAGS (-1) #elif defined(CONFIG_SA1100_ASSABET) @@ -177,6 +178,7 @@ #define SMC_outb(v, a, r) writeb(v, (a) + (r)) #define SMC_insb(a, r, p, l) readsb((a) + (r), p, (l)) #define SMC_outsb(a, r, p, l) writesb((a) + (r), p, (l)) +#define SMC_IRQ_FLAGS (-1) /* from resource */ #elif defined(CONFIG_MACH_LOGICPD_PXA270) @@ -194,7 +196,8 @@ #elif defined(CONFIG_ARCH_INNOKOM) || \ defined(CONFIG_MACH_MAINSTONE) || \ defined(CONFIG_ARCH_PXA_IDP) || \ - defined(CONFIG_ARCH_RAMSES) + defined(CONFIG_ARCH_RAMSES) || \ + defined(CONFIG_ARCH_PCM027) #define SMC_CAN_USE_8BIT 1 #define SMC_CAN_USE_16BIT 1 @@ -210,6 +213,7 @@ #define SMC_outl(v, a, r) writel(v, (a) + (r)) #define SMC_insl(a, r, p, l) readsl((a) + (r), p, l) #define SMC_outsl(a, r, p, l) writesl((a) + (r), p, l) +#define SMC_IRQ_FLAGS (-1) /* from resource */ /* We actually can't write halfwords properly if not word aligned */ static inline void @@ -224,6 +228,22 @@ SMC_outw(u16 val, void __iomem *ioaddr, int reg) } } +#elif defined(CONFIG_MACH_ZYLONITE) + +#define SMC_CAN_USE_8BIT 1 +#define SMC_CAN_USE_16BIT 1 +#define SMC_CAN_USE_32BIT 0 +#define SMC_IO_SHIFT 0 +#define SMC_NOWAIT 1 +#define SMC_USE_PXA_DMA 1 +#define SMC_inb(a, r) readb((a) + (r)) +#define SMC_inw(a, r) readw((a) + (r)) +#define SMC_insw(a, r, p, l) insw((a) + (r), p, l) +#define SMC_outsw(a, r, p, l) outsw((a) + (r), p, l) +#define SMC_outb(v, a, r) writeb(v, (a) + (r)) +#define SMC_outw(v, a, r) writew(v, (a) + (r)) +#define SMC_IRQ_FLAGS (-1) /* from resource */ + #elif defined(CONFIG_ARCH_OMAP) /* We can only do 16-bit reads and writes in the static memory space. */ @@ -237,17 +257,7 @@ SMC_outw(u16 val, void __iomem *ioaddr, int reg) #define SMC_outw(v, a, r) writew(v, (a) + (r)) #define SMC_insw(a, r, p, l) readsw((a) + (r), p, l) #define SMC_outsw(a, r, p, l) writesw((a) + (r), p, l) - -#include -#include - -#define SMC_IRQ_FLAGS (( \ - machine_is_omap_h2() \ - || machine_is_omap_h3() \ - || machine_is_omap_h4() \ - || (machine_is_omap_innovator() && !cpu_is_omap1510()) \ - ) ? IRQF_TRIGGER_FALLING : IRQF_TRIGGER_RISING) - +#define SMC_IRQ_FLAGS (-1) /* from resource */ #elif defined(CONFIG_SH_SH4202_MICRODEV) @@ -438,11 +448,22 @@ static inline void LPD7_SMC_outsw (unsigned char* a, int r, #define SMC_outl(v, a, r) writel(v, (a) + (r)) #define SMC_insl(a, r, p, l) readsl((a) + (r), p, l) #define SMC_outsl(a, r, p, l) writesl((a) + (r), p, l) +#define SMC_IRQ_FLAGS (-1) /* from resource */ -#define SMC_IRQ_FLAGS (0) +#elif defined(CONFIG_MN10300) + +/* + * MN10300/AM33 configuration + */ + +#include #else +/* + * Default configuration + */ + #define SMC_CAN_USE_8BIT 1 #define SMC_CAN_USE_16BIT 1 #define SMC_CAN_USE_32BIT 1 @@ -462,6 +483,52 @@ static inline void LPD7_SMC_outsw (unsigned char* a, int r, #endif + +/* store this information for the driver.. */ +struct smc_local { + /* + * If I have to wait until memory is available to send a + * packet, I will store the skbuff here, until I get the + * desired memory. Then, I'll send it out and free it. + */ + struct sk_buff *pending_tx_skb; + struct tasklet_struct tx_task; + + /* version/revision of the SMC91x chip */ + int version; + + /* Contains the current active transmission mode */ + int tcr_cur_mode; + + /* Contains the current active receive mode */ + int rcr_cur_mode; + + /* Contains the current active receive/phy mode */ + int rpc_cur_mode; + int ctl_rfduplx; + int ctl_rspeed; + + u32 msg_enable; + u32 phy_type; + struct mii_if_info mii; + + /* work queue */ + struct work_struct phy_configure; + struct net_device *dev; + int work_pending; + + spinlock_t lock; + +#ifdef SMC_USE_PXA_DMA + /* DMA needs the physical address of the chip */ + u_long physaddr; + struct device *device; +#endif + void __iomem *base; + void __iomem *datacs; +}; + + #ifdef SMC_USE_PXA_DMA /* * Let's use the DMA engine on the XScale PXA2xx for RX packets. This is @@ -476,11 +543,12 @@ static inline void LPD7_SMC_outsw (unsigned char* a, int r, #ifdef SMC_insl #undef SMC_insl #define SMC_insl(a, r, p, l) \ - smc_pxa_dma_insl(a, lp->physaddr, r, dev->dma, p, l) + smc_pxa_dma_insl(a, lp, r, dev->dma, p, l) static inline void -smc_pxa_dma_insl(void __iomem *ioaddr, u_long physaddr, int reg, int dma, +smc_pxa_dma_insl(void __iomem *ioaddr, struct smc_local *lp, int reg, int dma, u_char *buf, int len) { + u_long physaddr = lp->physaddr; dma_addr_t dmabuf; /* fallback if no DMA available */ @@ -497,7 +565,7 @@ smc_pxa_dma_insl(void __iomem *ioaddr, u_long physaddr, int reg, int dma, } len *= 4; - dmabuf = dma_map_single(NULL, buf, len, DMA_FROM_DEVICE); + dmabuf = dma_map_single(lp->device, buf, len, DMA_FROM_DEVICE); DCSR(dma) = DCSR_NODESC; DTADR(dma) = dmabuf; DSADR(dma) = physaddr + reg; @@ -507,18 +575,19 @@ smc_pxa_dma_insl(void __iomem *ioaddr, u_long physaddr, int reg, int dma, while (!(DCSR(dma) & DCSR_STOPSTATE)) cpu_relax(); DCSR(dma) = 0; - dma_unmap_single(NULL, dmabuf, len, DMA_FROM_DEVICE); + dma_unmap_single(lp->device, dmabuf, len, DMA_FROM_DEVICE); } #endif #ifdef SMC_insw #undef SMC_insw #define SMC_insw(a, r, p, l) \ - smc_pxa_dma_insw(a, lp->physaddr, r, dev->dma, p, l) + smc_pxa_dma_insw(a, lp, r, dev->dma, p, l) static inline void -smc_pxa_dma_insw(void __iomem *ioaddr, u_long physaddr, int reg, int dma, +smc_pxa_dma_insw(void __iomem *ioaddr, struct smc_local *lp, int reg, int dma, u_char *buf, int len) { + u_long physaddr = lp->physaddr; dma_addr_t dmabuf; /* fallback if no DMA available */ @@ -535,7 +604,7 @@ smc_pxa_dma_insw(void __iomem *ioaddr, u_long physaddr, int reg, int dma, } len *= 2; - dmabuf = dma_map_single(NULL, buf, len, DMA_FROM_DEVICE); + dmabuf = dma_map_single(lp->device, buf, len, DMA_FROM_DEVICE); DCSR(dma) = DCSR_NODESC; DTADR(dma) = dmabuf; DSADR(dma) = physaddr + reg; @@ -545,7 +614,7 @@ smc_pxa_dma_insw(void __iomem *ioaddr, u_long physaddr, int reg, int dma, while (!(DCSR(dma) & DCSR_STOPSTATE)) cpu_relax(); DCSR(dma) = 0; - dma_unmap_single(NULL, dmabuf, len, DMA_FROM_DEVICE); + dma_unmap_single(lp->device, dmabuf, len, DMA_FROM_DEVICE); } #endif