X-Git-Url: http://pilppa.org/gitweb/gitweb.cgi?a=blobdiff_plain;f=include%2Fasm-alpha%2Ftlbflush.h;h=9d87aaa08c0df1cf093bbb90227a2f8470adb70e;hb=3da1c84c00c7e5fa8348336bd8c342f9128b0f14;hp=1ca3ed3bd6d38f1c2461e5d83980758affeac76e;hpb=d9eaec9e295a84a80b663996d0489fcff3a1dca9;p=linux-2.6-omap-h63xx.git diff --git a/include/asm-alpha/tlbflush.h b/include/asm-alpha/tlbflush.h index 1ca3ed3bd6d..9d87aaa08c0 100644 --- a/include/asm-alpha/tlbflush.h +++ b/include/asm-alpha/tlbflush.h @@ -3,6 +3,7 @@ #include #include +#include #ifndef __EXTERN_INLINE #define __EXTERN_INLINE extern inline @@ -92,17 +93,6 @@ flush_tlb_other(struct mm_struct *mm) if (*mmc) *mmc = 0; } -/* Flush a specified range of user mapping page tables from TLB. - Although Alpha uses VPTE caches, this can be a nop, as Alpha does - not have finegrained tlb flushing, so it will flush VPTE stuff - during next flush_tlb_range. */ - -static inline void -flush_tlb_pgtables(struct mm_struct *mm, unsigned long start, - unsigned long end) -{ -} - #ifndef CONFIG_SMP /* Flush everything (kernel mapping may also have changed due to vmalloc/vfree). */ @@ -152,6 +142,10 @@ extern void flush_tlb_range(struct vm_area_struct *, unsigned long, #endif /* CONFIG_SMP */ -#define flush_tlb_kernel_range(start, end) flush_tlb_all() +static inline void flush_tlb_kernel_range(unsigned long start, + unsigned long end) +{ + flush_tlb_all(); +} #endif /* _ALPHA_TLBFLUSH_H */