X-Git-Url: http://pilppa.org/gitweb/gitweb.cgi?a=blobdiff_plain;f=include%2Fasm-arm%2Ftlbflush.h;h=8c6bc1bb9d1a5cb83c0abe7359841c1c48011bf0;hb=20118ff97823822bf4d52ccb528ce2b5042c3057;hp=71be4fded7e20f1b069f2dbe7ad3c6a5d63456ca;hpb=aba297927d1d558c7a94548135133bdf9172708a;p=linux-2.6-omap-h63xx.git

diff --git a/include/asm-arm/tlbflush.h b/include/asm-arm/tlbflush.h
index 71be4fded7e..8c6bc1bb9d1 100644
--- a/include/asm-arm/tlbflush.h
+++ b/include/asm-arm/tlbflush.h
@@ -463,11 +463,6 @@ extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
  */
 extern void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t pte);
 
-/*
- * ARM processors do not cache TLB tables in RAM.
- */
-#define flush_tlb_pgtables(mm,start,end)	do { } while (0)
-
 #endif
 
 #endif /* CONFIG_MMU */