X-Git-Url: http://pilppa.org/gitweb/gitweb.cgi?a=blobdiff_plain;f=include%2Fasm-mips%2Fmips-boards%2Fmalta.h;h=c1891578fa65893bf423a2e2e841f5dbf4c1c315;hb=f8b71a3a92d69cb1c9c2162f9235d3dd550e4aa0;hp=93bf4e51b8a4a7f28d201854ba723c354db04d1d;hpb=547307420931344a868275bd7ea7a30f117a15a9;p=linux-2.6-omap-h63xx.git

diff --git a/include/asm-mips/mips-boards/malta.h b/include/asm-mips/mips-boards/malta.h
index 93bf4e51b8a..c1891578fa6 100644
--- a/include/asm-mips/mips-boards/malta.h
+++ b/include/asm-mips/mips-boards/malta.h
@@ -51,6 +51,29 @@ static inline unsigned long get_msc_port_base(unsigned long reg)
 	return (unsigned long) ioremap(addr, 0x10000);
 }
 
+/*
+ * GCMP Specific definitions
+ */
+#define GCMP_BASE_ADDR			0x1fbf8000
+#define GCMP_ADDRSPACE_SZ		(256 * 1024)
+
+/*
+ * GIC Specific definitions
+ */
+#define GIC_BASE_ADDR			0x1bdc0000
+#define GIC_ADDRSPACE_SZ		(128 * 1024)
+
+/*
+ * MSC01 BIU Specific definitions
+ * FIXME : These should be elsewhere ?
+ */
+#define MSC01_BIU_REG_BASE		0x1bc80000
+#define MSC01_BIU_ADDRSPACE_SZ		(256 * 1024)
+#define MSC01_SC_CFG_OFS		0x0110
+#define MSC01_SC_CFG_GICPRES_MSK	0x00000004
+#define MSC01_SC_CFG_GICPRES_SHF	2
+#define MSC01_SC_CFG_GICENA_SHF		3
+
 /*
  * Malta RTC-device indirect register access.
  */