X-Git-Url: http://pilppa.org/gitweb/gitweb.cgi?a=blobdiff_plain;f=include%2Fasm-mips%2Fsmtc.h;h=ff3e8936b493d8b7137ab991fe84fd9e1bdebc19;hb=c4c66cf1787d408066fbfc69209185701f5df15f;hp=44dfa4adecf323e970fcdd17d6c1aed8e67ab32e;hpb=4e337adae4e960f64043b9f433c4a825c902616c;p=linux-2.6-omap-h63xx.git

diff --git a/include/asm-mips/smtc.h b/include/asm-mips/smtc.h
index 44dfa4adecf..ff3e8936b49 100644
--- a/include/asm-mips/smtc.h
+++ b/include/asm-mips/smtc.h
@@ -55,4 +55,14 @@ extern void smtc_boot_secondary(int cpu, struct task_struct *t);
 
 #define PARKED_INDEX	((unsigned int)0x80000000)
 
+/*
+ * Define low-level interrupt mask for IPIs, if necessary.
+ * By default, use SW interrupt 1, which requires no external
+ * hardware support, but which works only for single-core
+ * MIPS MT systems.
+ */
+#ifndef MIPS_CPU_IPI_IRQ
+#define MIPS_CPU_IPI_IRQ 1
+#endif
+
 #endif /*  _ASM_SMTC_MT_H */