X-Git-Url: http://pilppa.org/gitweb/gitweb.cgi?a=blobdiff_plain;f=include%2Fasm-powerpc%2Fsynch.h;h=2cda3c38a9fa10afa8816eaaea6197e78ff64b51;hb=f3aafa6c2535d36542a6dfc8647cd2fdb5999648;hp=4660c0394a7768c754e5f99c930a26a95595e7c6;hpb=7211bb9b64f17b23834d91fc3d0c1d78671ee9a8;p=linux-2.6-omap-h63xx.git

diff --git a/include/asm-powerpc/synch.h b/include/asm-powerpc/synch.h
index 4660c0394a7..2cda3c38a9f 100644
--- a/include/asm-powerpc/synch.h
+++ b/include/asm-powerpc/synch.h
@@ -1,7 +1,8 @@
 #ifndef _ASM_POWERPC_SYNCH_H 
 #define _ASM_POWERPC_SYNCH_H 
+#ifdef __KERNEL__
 
-#include <linux/config.h>
+#include <linux/stringify.h>
 
 #ifdef __powerpc64__
 #define __SUBARCH_HAS_LWSYNC
@@ -13,20 +14,12 @@
 #    define LWSYNC	sync
 #endif
 
-
-/*
- * Arguably the bitops and *xchg operations don't imply any memory barrier
- * or SMP ordering, but in fact a lot of drivers expect them to imply
- * both, since they do on x86 cpus.
- */
 #ifdef CONFIG_SMP
-#define EIEIO_ON_SMP	"eieio\n"
-#define ISYNC_ON_SMP	"\n\tisync"
-#define SYNC_ON_SMP	__stringify(LWSYNC) "\n"
+#define ISYNC_ON_SMP	"\n\tisync\n"
+#define LWSYNC_ON_SMP	__stringify(LWSYNC) "\n"
 #else
-#define EIEIO_ON_SMP
 #define ISYNC_ON_SMP
-#define SYNC_ON_SMP
+#define LWSYNC_ON_SMP
 #endif
 
 static inline void eieio(void)
@@ -39,13 +32,5 @@ static inline void isync(void)
 	__asm__ __volatile__ ("isync" : : : "memory");
 }
 
-#ifdef CONFIG_SMP
-#define eieio_on_smp()	eieio()
-#define isync_on_smp()	isync()
-#else
-#define eieio_on_smp()	__asm__ __volatile__("": : :"memory")
-#define isync_on_smp()	__asm__ __volatile__("": : :"memory")
-#endif
-
+#endif /* __KERNEL__ */
 #endif	/* _ASM_POWERPC_SYNCH_H */
-