X-Git-Url: http://pilppa.org/gitweb/gitweb.cgi?a=blobdiff_plain;f=include%2Fasm-x86_64%2Fcache.h;h=263f0a211ed7b36880cba02eba00f8645e2054e5;hb=6bc096565d4adb6fa84bee5068122923b8d58691;hp=33e53424128b33a4096162bfe29848b2885a8b16;hpb=1ef43204f4bd24dcd3156185b19b31b6b4151ae9;p=linux-2.6-omap-h63xx.git

diff --git a/include/asm-x86_64/cache.h b/include/asm-x86_64/cache.h
index 33e53424128..263f0a211ed 100644
--- a/include/asm-x86_64/cache.h
+++ b/include/asm-x86_64/cache.h
@@ -9,6 +9,17 @@
 /* L1 cache line size */
 #define L1_CACHE_SHIFT	(CONFIG_X86_L1_CACHE_SHIFT)
 #define L1_CACHE_BYTES	(1 << L1_CACHE_SHIFT)
-#define L1_CACHE_SHIFT_MAX 7	/* largest L1 which this arch supports */
+
+#ifdef CONFIG_X86_VSMP
+
+/* vSMP Internode cacheline shift */
+#define INTERNODE_CACHE_SHIFT (12)
+#ifdef CONFIG_SMP
+#define __cacheline_aligned_in_smp					\
+       __attribute__((__aligned__(1 << (INTERNODE_CACHE_SHIFT))))         \
+       __attribute__((__section__(".data.page_aligned")))
+#endif
+
+#endif
 
 #endif