Patch from Ben Dooks
The wrong variable is written back to CLKDIVN
register if the USB PLL speed is above 94MHz
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
clkdivn = __raw_readl(S3C2410_CLKDIVN);
clkdivn |= S3C2440_CLKDIVN_UCLK;
clkdivn = __raw_readl(S3C2410_CLKDIVN);
clkdivn |= S3C2440_CLKDIVN_UCLK;
- __raw_writel(camdivn, S3C2410_CLKDIVN);
+ __raw_writel(clkdivn, S3C2410_CLKDIVN);
mutex_unlock(&clocks_mutex);
}
mutex_unlock(&clocks_mutex);
}