rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
 }
 
+static void rtl8168bb_hw_phy_config(void __iomem *ioaddr)
+{
+       struct phy_reg phy_reg_init[] = {
+               { 0x10, 0xf41b },
+               { 0x1f, 0x0000 }
+       };
+
+       mdio_write(ioaddr, 0x1f, 0x0001);
+       mdio_patch(ioaddr, 0x16, 1 << 0);
+
+       rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
+}
+
+static void rtl8168bef_hw_phy_config(void __iomem *ioaddr)
+{
+       struct phy_reg phy_reg_init[] = {
+               { 0x1f, 0x0001 },
+               { 0x10, 0xf41b },
+               { 0x1f, 0x0000 }
+       };
+
+       rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
+}
+
 static void rtl8168cp_hw_phy_config(void __iomem *ioaddr)
 {
        struct phy_reg phy_reg_init[] = {
        case RTL_GIGA_MAC_VER_09:
                rtl8102e_hw_phy_config(ioaddr);
                break;
+       case RTL_GIGA_MAC_VER_11:
+               rtl8168bb_hw_phy_config(ioaddr);
+               break;
+       case RTL_GIGA_MAC_VER_12:
+               rtl8168bef_hw_phy_config(ioaddr);
+               break;
+       case RTL_GIGA_MAC_VER_17:
+               rtl8168bef_hw_phy_config(ioaddr);
+               break;
        case RTL_GIGA_MAC_VER_18:
                rtl8168cp_hw_phy_config(ioaddr);
                break;