list_for_each_entry(dev, &bus->devices, bus_list) {
                if (dev->subordinate) {
-                       if (atomic_read(&dev->enable_cnt) == 0) {
+                       if (!pci_is_enabled(dev)) {
                                retval = pci_enable_device(dev);
                                pci_set_master(dev);
                        }
 
                return -EPERM;
 
        if (!val) {
-               if (atomic_read(&pdev->enable_cnt) != 0)
+               if (pci_is_enabled(pdev))
                        pci_disable_device(pdev);
                else
                        result = -EIO;
 
  */
 int pci_reenable_device(struct pci_dev *dev)
 {
-       if (atomic_read(&dev->enable_cnt))
+       if (pci_is_enabled(dev))
                return do_pci_enable_device(dev, (1 << PCI_NUM_RESOURCES) - 1);
        return 0;
 }
  */
 void pci_disable_enabled_device(struct pci_dev *dev)
 {
-       if (atomic_read(&dev->enable_cnt))
+       if (pci_is_enabled(dev))
                do_pci_disable_device(dev);
 }
 
 
        struct pci_bus_region region;
        u32 l, bu, lu, io_upper16;
 
-       if (!pci_is_root_bus(bus) && bus->is_added)
+       if (pci_is_enabled(bridge))
                return;
 
        dev_info(&bridge->dev, "PCI bridge, secondary bus %04x:%02x\n",
 
 int __must_check pcim_enable_device(struct pci_dev *pdev);
 void pcim_pin_device(struct pci_dev *pdev);
 
+static inline int pci_is_enabled(struct pci_dev *pdev)
+{
+       return (atomic_read(&pdev->enable_cnt) > 0);
+}
+
 static inline int pci_is_managed(struct pci_dev *pdev)
 {
        return pdev->is_managed;