.features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
        .shift          = 32,
        .rating         = 150,
-       .cpumask        = CPU_MASK_CPU0,
        .set_next_event = clkevt32k_next_event,
        .set_mode       = clkevt32k_mode,
 };
        clkevt.mult = div_sc(AT91_SLOW_CLOCK, NSEC_PER_SEC, clkevt.shift);
        clkevt.max_delta_ns = clockevent_delta2ns(AT91_ST_ALMV, &clkevt);
        clkevt.min_delta_ns = clockevent_delta2ns(2, &clkevt) + 1;
-       clkevt.cpumask = cpumask_of_cpu(0);
+       clkevt.cpumask = cpumask_of(0);
        clockevents_register_device(&clkevt);
 
        /* register clocksource */
 
        .features       = CLOCK_EVT_FEAT_PERIODIC,
        .shift          = 32,
        .rating         = 100,
-       .cpumask        = CPU_MASK_CPU0,
        .set_mode       = pit_clkevt_mode,
 };
 
 
        /* Set up and register clockevents */
        pit_clkevt.mult = div_sc(pit_rate, NSEC_PER_SEC, pit_clkevt.shift);
+       pit_clkevt.cpumask = cpumask_of(0);
        clockevents_register_device(&pit_clkevt);
 }
 
 
        clockevent_davinci.min_delta_ns =
                clockevent_delta2ns(1, &clockevent_davinci);
 
-       clockevent_davinci.cpumask = cpumask_of_cpu(0);
+       clockevent_davinci.cpumask = cpumask_of(0);
        clockevents_register_device(&clockevent_davinci);
 }
 
 
        clockevent_imx.min_delta_ns =
                clockevent_delta2ns(0xf, &clockevent_imx);
 
-       clockevent_imx.cpumask = cpumask_of_cpu(0);
+       clockevent_imx.cpumask = cpumask_of(0);
 
        clockevents_register_device(&clockevent_imx);
 
 
                clockevent_delta2ns(0xfffffffe, &clockevent_ixp4xx);
        clockevent_ixp4xx.min_delta_ns =
                clockevent_delta2ns(0xf, &clockevent_ixp4xx);
-       clockevent_ixp4xx.cpumask = cpumask_of_cpu(0);
+       clockevent_ixp4xx.cpumask = cpumask_of(0);
 
        clockevents_register_device(&clockevent_ixp4xx);
        return 0;
 
                        clockevent_delta2ns(0xf0000000 >> clock->shift, ce);
                /* 4 gets rounded down to 3 */
                ce->min_delta_ns = clockevent_delta2ns(4, ce);
-               ce->cpumask = cpumask_of_cpu(0);
+               ce->cpumask = cpumask_of(0);
 
                cs->mult = clocksource_hz2mult(clock->freq, cs->shift);
                res = clocksource_register(cs);
 
        ns9360_clockevent_device.min_delta_ns =
                clockevent_delta2ns(1, &ns9360_clockevent_device);
 
-       ns9360_clockevent_device.cpumask = cpumask_of_cpu(0);
+       ns9360_clockevent_device.cpumask = cpumask_of(0);
        clockevents_register_device(&ns9360_clockevent_device);
 
        setup_irq(IRQ_NS9360_TIMER0 + TIMER_CLOCKEVENT,
 
        clockevent_mpu_timer1.min_delta_ns =
                clockevent_delta2ns(1, &clockevent_mpu_timer1);
 
-       clockevent_mpu_timer1.cpumask = cpumask_of_cpu(0);
+       clockevent_mpu_timer1.cpumask = cpumask_of(0);
        clockevents_register_device(&clockevent_mpu_timer1);
 }
 
 
        clockevent_32k_timer.min_delta_ns =
                clockevent_delta2ns(1, &clockevent_32k_timer);
 
-       clockevent_32k_timer.cpumask = cpumask_of_cpu(0);
+       clockevent_32k_timer.cpumask = cpumask_of(0);
        clockevents_register_device(&clockevent_32k_timer);
 }
 
 
        clockevent_gpt.min_delta_ns =
                clockevent_delta2ns(1, &clockevent_gpt);
 
-       clockevent_gpt.cpumask = cpumask_of_cpu(0);
+       clockevent_gpt.cpumask = cpumask_of(0);
        clockevents_register_device(&clockevent_gpt);
 }
 
 
        .features       = CLOCK_EVT_FEAT_ONESHOT,
        .shift          = 32,
        .rating         = 200,
-       .cpumask        = CPU_MASK_CPU0,
        .set_next_event = pxa_osmr0_set_next_event,
        .set_mode       = pxa_osmr0_set_mode,
 };
                clockevent_delta2ns(0x7fffffff, &ckevt_pxa_osmr0);
        ckevt_pxa_osmr0.min_delta_ns =
                clockevent_delta2ns(MIN_OSCR_DELTA * 2, &ckevt_pxa_osmr0) + 1;
+       ckevt_pxa_osmr0.cpumask = cpumask_of(0);
 
        cksrc_pxa_oscr0.mult =
                clocksource_hz2mult(clock_tick_rate, cksrc_pxa_oscr0.shift);
 
        .set_mode       = timer_set_mode,
        .set_next_event = timer_set_next_event,
        .rating         = 300,
-       .cpumask        = CPU_MASK_ALL,
+       .cpumask        = cpu_all_mask,
 };
 
 static void __init realview_clockevents_init(unsigned int timer_irq)
 
        clk->set_mode           = local_timer_set_mode;
        clk->set_next_event     = local_timer_set_next_event;
        clk->irq                = IRQ_LOCALTIMER;
-       clk->cpumask            = cpumask_of_cpu(cpu);
+       clk->cpumask            = cpumask_of(cpu);
        clk->shift              = 20;
        clk->mult               = div_sc(mpcore_timer_rate, NSEC_PER_SEC, clk->shift);
        clk->max_delta_ns       = clockevent_delta2ns(0xffffffff, clk);
        clk->rating             = 200;
        clk->set_mode           = dummy_timer_set_mode;
        clk->broadcast          = smp_timer_broadcast;
-       clk->cpumask            = cpumask_of_cpu(cpu);
+       clk->cpumask            = cpumask_of(cpu);
 
        clockevents_register_device(clk);
 }
 
        .features       = CLOCK_EVT_FEAT_ONESHOT,
        .shift          = 32,
        .rating         = 200,
-       .cpumask        = CPU_MASK_CPU0,
        .set_next_event = sa1100_osmr0_set_next_event,
        .set_mode       = sa1100_osmr0_set_mode,
 };
                clockevent_delta2ns(0x7fffffff, &ckevt_sa1100_osmr0);
        ckevt_sa1100_osmr0.min_delta_ns =
                clockevent_delta2ns(MIN_OSCR_DELTA * 2, &ckevt_sa1100_osmr0) + 1;
+       ckevt_sa1100_osmr0.cpumask = cpumask_of(0);
 
        cksrc_sa1100_oscr.mult =
                clocksource_hz2mult(CLOCK_TICK_RATE, cksrc_sa1100_oscr.shift);
 
        timer0_clockevent.min_delta_ns =
                clockevent_delta2ns(0xf, &timer0_clockevent);
 
-       timer0_clockevent.cpumask = cpumask_of_cpu(0);
+       timer0_clockevent.cpumask = cpumask_of(0);
        clockevents_register_device(&timer0_clockevent);
 }
 
 
        clockevent_mxc.min_delta_ns =
                        clockevent_delta2ns(0xff, &clockevent_mxc);
 
-       clockevent_mxc.cpumask = cpumask_of_cpu(0);
+       clockevent_mxc.cpumask = cpumask_of(0);
 
        clockevents_register_device(&clockevent_mxc);
 
 
        .features       = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC,
        .shift          = 32,
        .rating         = 300,
-       .cpumask        = CPU_MASK_CPU0,
        .set_next_event = orion_clkevt_next_event,
        .set_mode       = orion_clkevt_mode,
 };
        orion_clkevt.mult = div_sc(tclk, NSEC_PER_SEC, orion_clkevt.shift);
        orion_clkevt.max_delta_ns = clockevent_delta2ns(0xfffffffe, &orion_clkevt);
        orion_clkevt.min_delta_ns = clockevent_delta2ns(1, &orion_clkevt);
+       orion_clkevt.cpumask = cpumask_of(0);
        clockevents_register_device(&orion_clkevt);
 }
 
        .features       = CLOCK_EVT_FEAT_ONESHOT,
        .shift          = 16,
        .rating         = 50,
-       .cpumask        = CPU_MASK_CPU0,
        .set_next_event = comparator_next_event,
        .set_mode       = comparator_mode,
 };
        comparator.mult = div_sc(counter_hz, NSEC_PER_SEC, comparator.shift);
        comparator.max_delta_ns = clockevent_delta2ns((u32)~0, &comparator);
        comparator.min_delta_ns = clockevent_delta2ns(50, &comparator) + 1;
+       comparator.cpumask = cpumask_of(0);
 
        sysreg_write(COMPARE, 0);
        timer_irqaction.dev_id = &comparator;
 
        .name           = "bfin_core_timer",
        .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
        .shift          = 32,
-       .cpumask        = CPU_MASK_CPU0,
        .set_next_event = bfin_timer_set_next_event,
        .set_mode       = bfin_timer_set_mode,
 };
        clockevent_bfin.mult = div_sc(timer_clk, NSEC_PER_SEC, clockevent_bfin.shift);
        clockevent_bfin.max_delta_ns = clockevent_delta2ns(-1, &clockevent_bfin);
        clockevent_bfin.min_delta_ns = clockevent_delta2ns(100, &clockevent_bfin);
+       clockevent_bfin.cpumask = cpumask_of(0);
        clockevents_register_device(&clockevent_bfin);
 
        return 0;
 
 {
        u32 imr;
 
-       cf_pit_clockevent.cpumask = cpumask_of_cpu(smp_processor_id());
+       cf_pit_clockevent.cpumask = cpumask_of(smp_processor_id());
        cf_pit_clockevent.mult = div_sc(FREQ, NSEC_PER_SEC, 32);
        cf_pit_clockevent.max_delta_ns =
                clockevent_delta2ns(0xFFFF, &cf_pit_clockevent);
 
 
        BUG_ON(HZ != 100);
 
-       cd->cpumask             = cpumask_of_cpu(cpu);
+       cd->cpumask             = cpumask_of(cpu);
        clockevents_register_device(cd);
        action->dev_id = cd;
        setup_irq(JAZZ_TIMER_IRQ, action);
 
        cd->min_delta_ns        = clockevent_delta2ns(2, cd);
        cd->rating              = 200;
        cd->irq                 = irq;
-       cd->cpumask             = cpumask_of_cpu(cpu);
+       cd->cpumask             = cpumask_of(cpu);
        cd->set_next_event      = sibyte_next_event;
        cd->set_mode            = sibyte_set_mode;
        clockevents_register_device(cd);
 
 static struct clock_event_device ds1287_clockevent = {
        .name           = "ds1287",
        .features       = CLOCK_EVT_FEAT_PERIODIC,
-       .cpumask        = CPU_MASK_CPU0,
        .set_next_event = ds1287_set_next_event,
        .set_mode       = ds1287_set_mode,
        .event_handler  = ds1287_event_handler,
        clockevent_set_clock(cd, 32768);
        cd->max_delta_ns = clockevent_delta2ns(0x7fffffff, cd);
        cd->min_delta_ns = clockevent_delta2ns(0x300, cd);
+       cd->cpumask = cpumask_of(0);
 
        clockevents_register_device(&ds1287_clockevent);
 
 
 static struct clock_event_device gt641xx_timer0_clockevent = {
        .name           = "gt641xx-timer0",
        .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
-       .cpumask        = CPU_MASK_CPU0,
        .irq            = GT641XX_TIMER0_IRQ,
        .set_next_event = gt641xx_timer0_set_next_event,
        .set_mode       = gt641xx_timer0_set_mode,
        clockevent_set_clock(cd, gt641xx_base_clock);
        cd->max_delta_ns = clockevent_delta2ns(0x7fffffff, cd);
        cd->min_delta_ns = clockevent_delta2ns(0x300, cd);
+       cd->cpumask = cpumask_of(0);
 
        clockevents_register_device(>641xx_timer0_clockevent);
 
 
 
        cd->rating              = 300;
        cd->irq                 = irq;
-       cd->cpumask             = cpumask_of_cpu(cpu);
+       cd->cpumask             = cpumask_of(cpu);
        cd->set_next_event      = mips_next_event;
        cd->set_mode            = mips_set_clock_mode;
        cd->event_handler       = mips_event_handler;
 
        cd->min_delta_ns        = clockevent_delta2ns(2, cd);
        cd->rating              = 200;
        cd->irq                 = irq;
-       cd->cpumask             = cpumask_of_cpu(cpu);
+       cd->cpumask             = cpumask_of(cpu);
        cd->set_next_event      = sibyte_next_event;
        cd->set_mode            = sibyte_set_mode;
        clockevents_register_device(cd);
 
 
        cd->rating              = 300;
        cd->irq                 = irq;
-       cd->cpumask             = cpumask_of_cpu(cpu);
+       cd->cpumask             = cpumask_of(cpu);
        cd->set_next_event      = mips_next_event;
        cd->set_mode            = mips_set_clock_mode;
        cd->event_handler       = mips_event_handler;
 
        .name           = "TXx9",
        .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
        .rating         = 200,
-       .cpumask        = CPU_MASK_CPU0,
        .set_mode       = txx9tmr_set_mode,
        .set_next_event = txx9tmr_set_next_event,
 };
                clockevent_delta2ns(0xffffffff >> (32 - TXX9_TIMER_BITS), cd);
        cd->min_delta_ns = clockevent_delta2ns(0xf, cd);
        cd->irq = irq;
+       cd->cpumask = cpumask_of(0),
        clockevents_register_device(cd);
        setup_irq(irq, &txx9tmr_irq);
        printk(KERN_INFO "TXx9: clockevent device at 0x%lx, irq %d\n",
 
         * Start pit with the boot cpu mask and make it global after the
         * IO_APIC has been initialized.
         */
-       cd->cpumask = cpumask_of_cpu(cpu);
+       cd->cpumask = cpumask_of(cpu);
        clockevent_set_clock(cd, CLOCK_TICK_RATE);
        cd->max_delta_ns = clockevent_delta2ns(0x7FFF, cd);
        cd->min_delta_ns = clockevent_delta2ns(0xF, cd);
 
        unsigned int p;
        unsigned int pow2p;
 
+       pnx8xxx_clockevent.cpumask = cpu_none_mask;
        clockevents_register_device(&pnx8xxx_clockevent);
        clocksource_register(&pnx_clocksource);
 
 
        cd->min_delta_ns        = clockevent_delta2ns(0x300, cd);
        cd->rating              = 200;
        cd->irq                 = irq;
-       cd->cpumask             = cpumask_of_cpu(cpu);
+       cd->cpumask             = cpumask_of(cpu);
        cd->set_next_event      = rt_next_event;
        cd->set_mode            = rt_set_mode;
        clockevents_register_device(cd);
 
        struct irqaction *action = &a20r_irqaction;
        unsigned int cpu = smp_processor_id();
 
-       cd->cpumask             = cpumask_of_cpu(cpu);
+       cd->cpumask             = cpumask_of(cpu);
        clockevents_register_device(cd);
        action->dev_id = cd;
        setup_irq(SNI_A20R_IRQ_TIMER, &a20r_irqaction);
 
        struct clock_event_device *dec = &per_cpu(decrementers, cpu).event;
 
        *dec = decrementer_clockevent;
-       dec->cpumask = cpumask_of_cpu(cpu);
+       dec->cpumask = cpumask_of(cpu);
 
        printk(KERN_DEBUG "clockevent: %s mult[%lx] shift[%d] cpu[%d]\n",
               dec->name, dec->mult, dec->shift, cpu);
 
        cd->min_delta_ns        = 1;
        cd->max_delta_ns        = LONG_MAX;
        cd->rating              = 400;
-       cd->cpumask             = cpumask_of_cpu(cpu);
+       cd->cpumask             = cpumask_of(cpu);
        cd->set_next_event      = s390_next_event;
        cd->set_mode            = s390_set_mode;
 
 
 };
 
 void smp_message_recv(unsigned int msg);
-void smp_timer_broadcast(cpumask_t mask);
+void smp_timer_broadcast(const struct cpumask *mask);
 
 void local_timer_interrupt(void);
 void local_timer_setup(unsigned int cpu);
 
        plat_send_ipi(cpu, SMP_MSG_FUNCTION_SINGLE);
 }
 
-void smp_timer_broadcast(cpumask_t mask)
+void smp_timer_broadcast(const struct cpumask *mask)
 {
        int cpu;
 
-       for_each_cpu_mask(cpu, mask)
+       for_each_cpu(cpu, mask)
                plat_send_ipi(cpu, SMP_MSG_TIMER);
 }
 
 
        clk->mult               = 1;
        clk->set_mode           = dummy_timer_set_mode;
        clk->broadcast          = smp_timer_broadcast;
-       clk->cpumask            = cpumask_of_cpu(cpu);
+       clk->cpumask            = cpumask_of(cpu);
 
        clockevents_register_device(clk);
 }
 
        tmu0_clockevent.min_delta_ns =
                        clockevent_delta2ns(1, &tmu0_clockevent);
 
-       tmu0_clockevent.cpumask = cpumask_of_cpu(0);
+       tmu0_clockevent.cpumask = cpumask_of(0);
 
        clockevents_register_device(&tmu0_clockevent);
 
 
        sevt = &__get_cpu_var(sparc64_events);
 
        memcpy(sevt, &sparc64_clockevent, sizeof(*sevt));
-       sevt->cpumask = cpumask_of_cpu(smp_processor_id());
+       sevt->cpumask = cpumask_of(smp_processor_id());
 
        clockevents_register_device(sevt);
 }
 
 static struct clock_event_device itimer_clockevent = {
        .name           = "itimer",
        .rating         = 250,
-       .cpumask        = CPU_MASK_ALL,
+       .cpumask        = cpu_all_mask,
        .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
        .set_mode       = itimer_set_mode,
        .set_next_event = itimer_next_event,
 
                            struct clock_event_device *evt);
 static void lapic_timer_setup(enum clock_event_mode mode,
                              struct clock_event_device *evt);
-static void lapic_timer_broadcast(cpumask_t mask);
+static void lapic_timer_broadcast(const struct cpumask *mask);
 static void apic_pm_activate(void);
 
 /*
 /*
  * Local APIC timer broadcast function
  */
-static void lapic_timer_broadcast(cpumask_t mask)
+static void lapic_timer_broadcast(const struct cpumask *mask)
 {
 #ifdef CONFIG_SMP
-       send_IPI_mask(mask, LOCAL_TIMER_VECTOR);
+       send_IPI_mask(*mask, LOCAL_TIMER_VECTOR);
 #endif
 }
 
        struct clock_event_device *levt = &__get_cpu_var(lapic_events);
 
        memcpy(levt, &lapic_clockevent, sizeof(*levt));
-       levt->cpumask = cpumask_of_cpu(smp_processor_id());
+       levt->cpumask = cpumask_of(smp_processor_id());
 
        clockevents_register_device(levt);
 }
 
         * Start hpet with the boot cpu mask and make it
         * global after the IO_APIC has been initialized.
         */
-       hpet_clockevent.cpumask = cpumask_of_cpu(smp_processor_id());
+       hpet_clockevent.cpumask = cpumask_of(smp_processor_id());
        clockevents_register_device(&hpet_clockevent);
        global_clock_event = &hpet_clockevent;
        printk(KERN_DEBUG "hpet clockevent registered\n");
        /* 5 usec minimum reprogramming delta. */
        evt->min_delta_ns = 5000;
 
-       evt->cpumask = cpumask_of_cpu(hdev->cpu);
+       evt->cpumask = cpumask_of(hdev->cpu);
        clockevents_register_device(evt);
 }
 
 
         * Start pit with the boot cpu mask and make it global after the
         * IO_APIC has been initialized.
         */
-       pit_clockevent.cpumask = cpumask_of_cpu(smp_processor_id());
+       pit_clockevent.cpumask = cpumask_of(smp_processor_id());
        pit_clockevent.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC,
                                     pit_clockevent.shift);
        pit_clockevent.max_delta_ns =
 
        .set_mode = mfgpt_set_mode,
        .set_next_event = mfgpt_next_event,
        .rating = 250,
-       .cpumask = CPU_MASK_ALL,
+       .cpumask = cpu_all_mask,
        .shift = 32
 };
 
 
        /* Upper bound is clockevent's use of ulong for cycle deltas. */
        evt->max_delta_ns = clockevent_delta2ns(ULONG_MAX, evt);
        evt->min_delta_ns = clockevent_delta2ns(1, evt);
-       evt->cpumask = cpumask_of_cpu(cpu);
+       evt->cpumask = cpumask_of(cpu);
 
        printk(KERN_WARNING "vmi: registering clock event %s. mult=%lu shift=%u\n",
               evt->name, evt->mult, evt->shift);
 
 
        /* We can't set cpumask in the initializer: damn C limitations!  Set it
         * here and register our timer device. */
-       lguest_clockevent.cpumask = cpumask_of_cpu(0);
+       lguest_clockevent.cpumask = cpumask_of(0);
        clockevents_register_device(&lguest_clockevent);
 
        /* Finally, we unblock the timer interrupt. */
 
        evt = &per_cpu(xen_clock_events, cpu);
        memcpy(evt, xen_clockevent, sizeof(*evt));
 
-       evt->cpumask = cpumask_of_cpu(cpu);
+       evt->cpumask = cpumask_of(cpu);
        evt->irq = irq;
 
        setup_runstate_info(cpu);
 
                .shift          = 32,
                /* Should be lower than at91rm9200's system timer */
                .rating         = 125,
-               .cpumask        = CPU_MASK_CPU0,
                .set_next_event = tc_next_event,
                .set_mode       = tc_mode,
        },
        clkevt.clkevt.max_delta_ns
                = clockevent_delta2ns(0xffff, &clkevt.clkevt);
        clkevt.clkevt.min_delta_ns = clockevent_delta2ns(1, &clkevt.clkevt) + 1;
+       clkevt.clkevt.cpumask = cpumask_of(0);
 
        setup_irq(irq, &tc_irqaction);
 
 
        int                     shift;
        int                     rating;
        int                     irq;
-       cpumask_t               cpumask;
+       const struct cpumask    *cpumask;
        int                     (*set_next_event)(unsigned long evt,
                                                  struct clock_event_device *);
        void                    (*set_mode)(enum clock_event_mode mode,
                                            struct clock_event_device *);
        void                    (*event_handler)(struct clock_event_device *);
-       void                    (*broadcast)(cpumask_t mask);
+       void                    (*broadcast)(const struct cpumask *mask);
        struct list_head        list;
        enum clock_event_mode   mode;
        ktime_t                 next_event;
 
 void clockevents_register_device(struct clock_event_device *dev)
 {
        BUG_ON(dev->mode != CLOCK_EVT_MODE_UNUSED);
+       BUG_ON(!dev->cpumask);
+
        /*
         * A nsec2cyc multiplicator of 0 is invalid and we'd crash
         * on it, so fix it up and emit a warning:
 
                 */
                cpu = first_cpu(mask);
                td = &per_cpu(tick_cpu_device, cpu);
-               td->evtdev->broadcast(mask);
+               td->evtdev->broadcast(&mask);
        }
 }
 
 
         * When the device is not per cpu, pin the interrupt to the
         * current cpu:
         */
-       if (!cpumask_equal(&newdev->cpumask, cpumask))
+       if (!cpumask_equal(newdev->cpumask, cpumask))
                irq_set_affinity(newdev->irq, cpumask);
 
        /*
        spin_lock_irqsave(&tick_device_lock, flags);
 
        cpu = smp_processor_id();
-       if (!cpu_isset(cpu, newdev->cpumask))
+       if (!cpumask_test_cpu(cpu, newdev->cpumask))
                goto out_bc;
 
        td = &per_cpu(tick_cpu_device, cpu);
        curdev = td->evtdev;
 
        /* cpu local device ? */
-       if (!cpus_equal(newdev->cpumask, cpumask_of_cpu(cpu))) {
+       if (!cpumask_equal(newdev->cpumask, cpumask_of(cpu))) {
 
                /*
                 * If the cpu affinity of the device interrupt can not
                 * If we have a cpu local device already, do not replace it
                 * by a non cpu local device
                 */
-               if (curdev && cpus_equal(curdev->cpumask, cpumask_of_cpu(cpu)))
+               if (curdev && cpumask_equal(curdev->cpumask, cpumask_of(cpu)))
                        goto out_bc;
        }