/* Determine NVRAM starting address. */
        ha->nvram_size = sizeof(struct nvram_81xx);
-       ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
        ha->vpd_size = FA_NVRAM_VPD_SIZE;
-       ha->vpd_base = FA_NVRAM_VPD0_ADDR;
-       if (PCI_FUNC(ha->pdev->devfn) & 1) {
-               ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
-               ha->vpd_base = FA_NVRAM_VPD1_ADDR;
-       }
 
        /* Get VPD data into cache */
        ha->vpd = ha->nvram + VPD_OFFSET;
-       ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
-           ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
+       ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
+           ha->vpd_size);
 
        /* Get NVRAM data into cache and calculate checksum. */
-       dptr = (uint32_t *)nv;
-       ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
+       ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
            ha->nvram_size);
+       dptr = (uint32_t *)nv;
        for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
                chksum += le32_to_cpu(*dptr++);
 
 
                { FA_BOOT_CODE_ADDR, FA_BOOT_CODE_ADDR, FA_BOOT_CODE_ADDR_81 };
        const uint32_t def_vpd_nvram[] =
                { FA_VPD_NVRAM_ADDR, FA_VPD_NVRAM_ADDR, FA_VPD_NVRAM_ADDR_81 };
+       const uint32_t def_vpd0[] =
+               { 0, 0, FA_VPD0_ADDR_81 };
+       const uint32_t def_vpd1[] =
+               { 0, 0, FA_VPD1_ADDR_81 };
+       const uint32_t def_nvram0[] =
+               { 0, 0, FA_NVRAM0_ADDR_81 };
+       const uint32_t def_nvram1[] =
+               { 0, 0, FA_NVRAM1_ADDR_81 };
        const uint32_t def_fdt[] =
                { FA_FLASH_DESCR_ADDR_24, FA_FLASH_DESCR_ADDR,
                        FA_FLASH_DESCR_ADDR_81 };
                        break;
                case FLT_REG_VPD_0:
                        ha->flt_region_vpd_nvram = start;
+                       if (!(PCI_FUNC(ha->pdev->devfn) & 1))
+                               ha->flt_region_vpd = start;
+                       break;
+               case FLT_REG_VPD_1:
+                       if (PCI_FUNC(ha->pdev->devfn) & 1)
+                               ha->flt_region_vpd = start;
+                       break;
+               case FLT_REG_NVRAM_0:
+                       if (!(PCI_FUNC(ha->pdev->devfn) & 1))
+                               ha->flt_region_nvram = start;
+                       break;
+               case FLT_REG_NVRAM_1:
+                       if (PCI_FUNC(ha->pdev->devfn) & 1)
+                               ha->flt_region_nvram = start;
                        break;
                case FLT_REG_FDT:
                        ha->flt_region_fdt = start;
        ha->flt_region_fw = def_fw[def];
        ha->flt_region_boot = def_boot[def];
        ha->flt_region_vpd_nvram = def_vpd_nvram[def];
+       ha->flt_region_vpd = !(PCI_FUNC(ha->pdev->devfn) & 1) ?
+           def_vpd0[def]: def_vpd1[def];
+       ha->flt_region_nvram = !(PCI_FUNC(ha->pdev->devfn) & 1) ?
+           def_nvram0[def]: def_nvram1[def];
        ha->flt_region_fdt = def_fdt[def];
        ha->flt_region_npiv_conf = !(PCI_FUNC(ha->pdev->devfn) & 1) ?
            def_npiv_conf0[def]: def_npiv_conf1[def];
 done:
        DEBUG2(qla_printk(KERN_DEBUG, ha, "FLT[%s]: boot=0x%x fw=0x%x "
-           "vpd_nvram=0x%x fdt=0x%x flt=0x%x npiv=0x%x.\n", loc,
-           ha->flt_region_boot, ha->flt_region_fw, ha->flt_region_vpd_nvram,
+           "vpd_nvram=0x%x vpd=0x%x nvram=0x%x fdt=0x%x flt=0x%x "
+           "npiv=0x%x.\n", loc, ha->flt_region_boot, ha->flt_region_fw,
+           ha->flt_region_vpd_nvram, ha->flt_region_vpd, ha->flt_region_nvram,
            ha->flt_region_fdt, ha->flt_region_flt, ha->flt_region_npiv_conf));
 }