OMAP3 clockdomains: include D2D clockdomain on 34xx ES2+

The OMAP34xx ES2+ TRMs do not document the CLKTRCTRL_D2D bit, even
though the clockdomain logic remains on the chip, and must be
programmed appropriately for the CORE clockdomain to go inactive.

Thanks to Rajendra Najak <rnayak@ti.com> and Richard Woodruff
<r-woodruff2@ti.com> of TI for providing more detail on this issue;
and to Jouni Högander <jouni.hogander@nokia.com> for proposing this
fix.

This patch obsoletes the D2D clockdomain workaround in pm34xx.c in
Jouni's recent patch set.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/mach-omap2/clockdomains.h b/arch/arm/mach-omap2/clockdomains.h
index adbc170e158c3f6e831905a541ec0b5568000546..b5d3244aa61eb3a35a35c137b2192fed7c59d4b9 100644 (file)
--- a/arch/arm/mach-omap2/clockdomains.h
+++ b/arch/arm/mach-omap2/clockdomains.h
@@ -168,12 +168,19 @@ static struct clockdomain sgx_clkdm = {
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2),
 };
 
+/*
+ * The die-to-die clockdomain was documented in the 34xx ES1 TRM, but
+ * then that information was removed from the 34xx ES2+ TRM.  It is
+ * unclear whether the core is still there, but the clockdomain logic
+ * is there, and must be programmed to an appropriate state if the
+ * CORE clockdomain is to become inactive.
+ */
 static struct clockdomain d2d_clkdm = {
        .name           = "d2d_clkdm",
        .pwrdm_name     = "core_pwrdm",
        .flags          = CLKDM_CAN_HWSUP,
        .clktrctrl_mask = OMAP3430ES1_CLKTRCTRL_D2D_MASK,
-       .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1),
+       .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
 static struct clockdomain core_l3_34xx_clkdm = {