if (!omap_chip_is(autodep->omap_chip))
                return;
 
-       pwrdm = pwrdm_lookup(autodep->pwrdm_name);
+       pwrdm = pwrdm_lookup(autodep->pwrdm.name);
        if (!pwrdm) {
                pr_debug("clockdomain: _autodep_lookup: powerdomain %s "
-                        "does not exist\n", autodep->pwrdm_name);
+                        "does not exist\n", autodep->pwrdm.name);
                WARN_ON(1);
                return;
        }
-       autodep->pwrdm = pwrdm;
+       autodep->pwrdm.ptr = pwrdm;
 
        return;
 }
 {
        struct clkdm_pwrdm_autodep *autodep;
 
-       for (autodep = autodeps; autodep->pwrdm_name; autodep++) {
-               if (!autodep->pwrdm)
-                       continue;
-
+       for (autodep = autodeps; autodep->pwrdm.ptr; autodep++) {
                pr_debug("clockdomain: adding %s sleepdep/wkdep for "
-                        "pwrdm %s\n", autodep->pwrdm_name,
-                        clkdm->pwrdm->name);
+                        "pwrdm %s\n", autodep->pwrdm.ptr->name,
+                        clkdm->pwrdm.ptr->name);
 
-               pwrdm_add_sleepdep(clkdm->pwrdm, autodep->pwrdm);
-               pwrdm_add_wkdep(clkdm->pwrdm, autodep->pwrdm);
+               pwrdm_add_sleepdep(clkdm->pwrdm.ptr, autodep->pwrdm.ptr);
+               pwrdm_add_wkdep(clkdm->pwrdm.ptr, autodep->pwrdm.ptr);
        }
 }
 
 {
        struct clkdm_pwrdm_autodep *autodep;
 
-       for (autodep = autodeps; autodep->pwrdm_name; autodep++) {
-               if (!autodep->pwrdm)
-                       continue;
-
+       for (autodep = autodeps; autodep->pwrdm.ptr; autodep++) {
                pr_debug("clockdomain: removing %s sleepdep/wkdep for "
-                        "pwrdm %s\n", autodep->pwrdm_name,
-                        clkdm->pwrdm->name);
+                        "pwrdm %s\n", autodep->pwrdm.ptr->name,
+                        clkdm->pwrdm.ptr->name);
 
-               pwrdm_del_sleepdep(clkdm->pwrdm, autodep->pwrdm);
-               pwrdm_del_wkdep(clkdm->pwrdm, autodep->pwrdm);
+               pwrdm_del_sleepdep(clkdm->pwrdm.ptr, autodep->pwrdm.ptr);
+               pwrdm_del_wkdep(clkdm->pwrdm.ptr, autodep->pwrdm.ptr);
        }
 }
 
 
        autodeps = init_autodeps;
        if (autodeps)
-               for (autodep = autodeps; autodep->pwrdm_name; autodep++)
+               for (autodep = autodeps; autodep->pwrdm.ptr; autodep++)
                        _autodep_lookup(autodep);
 }
 
        if (!omap_chip_is(clkdm->omap_chip))
                return -EINVAL;
 
-       pwrdm = pwrdm_lookup(clkdm->pwrdm_name);
+       pwrdm = pwrdm_lookup(clkdm->pwrdm.name);
        if (!pwrdm) {
                pr_debug("clockdomain: clkdm_register %s: powerdomain %s "
-                        "does not exist\n", clkdm->name, clkdm->pwrdm_name);
+                        "does not exist\n", clkdm->name, clkdm->pwrdm.name);
                return -EINVAL;
        }
-       clkdm->pwrdm = pwrdm;
+       clkdm->pwrdm.ptr = pwrdm;
 
        mutex_lock(&clkdm_mutex);
        /* Verify that the clockdomain is not already registered */
        if (!clkdm)
                return -EINVAL;
 
-       pwrdm_del_clkdm(clkdm->pwrdm, clkdm);
+       pwrdm_del_clkdm(clkdm->pwrdm.ptr, clkdm);
 
        mutex_lock(&clkdm_mutex);
        list_del(&clkdm->node);
        if (!clkdm)
                return NULL;
 
-       return clkdm->pwrdm;
+       return clkdm->pwrdm.ptr;
 }
 
 
        if (!clkdm)
                return -EINVAL;
 
-       v = cm_read_mod_reg(clkdm->pwrdm->prcm_offs, CM_CLKSTCTRL);
+       v = cm_read_mod_reg(clkdm->pwrdm.ptr->prcm_offs, CM_CLKSTCTRL);
        v &= clkdm->clktrctrl_mask;
        v >>= __ffs(clkdm->clktrctrl_mask);
 
        if (cpu_is_omap24xx()) {
 
                cm_set_mod_reg_bits(OMAP24XX_FORCESTATE,
-                                   clkdm->pwrdm->prcm_offs, PM_PWSTCTRL);
+                                   clkdm->pwrdm.ptr->prcm_offs, PM_PWSTCTRL);
 
        } else if (cpu_is_omap34xx()) {
 
                         __ffs(clkdm->clktrctrl_mask));
 
                cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, v,
-                                   clkdm->pwrdm->prcm_offs, CM_CLKSTCTRL);
+                                   clkdm->pwrdm.ptr->prcm_offs, CM_CLKSTCTRL);
 
        } else {
                BUG();
        if (cpu_is_omap24xx()) {
 
                cm_clear_mod_reg_bits(OMAP24XX_FORCESTATE,
-                                     clkdm->pwrdm->prcm_offs, PM_PWSTCTRL);
+                                     clkdm->pwrdm.ptr->prcm_offs, PM_PWSTCTRL);
 
        } else if (cpu_is_omap34xx()) {
 
                         __ffs(clkdm->clktrctrl_mask));
 
                cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, v,
-                                   clkdm->pwrdm->prcm_offs, CM_CLKSTCTRL);
+                                   clkdm->pwrdm.ptr->prcm_offs, CM_CLKSTCTRL);
 
        } else {
                BUG();
 
        cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask,
                            v << __ffs(clkdm->clktrctrl_mask),
-                           clkdm->pwrdm->prcm_offs,
+                           clkdm->pwrdm.ptr->prcm_offs,
                            CM_CLKSTCTRL);
 }
 
 
        cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask,
                            v << __ffs(clkdm->clktrctrl_mask),
-                           clkdm->pwrdm->prcm_offs, CM_CLKSTCTRL);
+                           clkdm->pwrdm.ptr->prcm_offs, CM_CLKSTCTRL);
 
        if (atomic_read(&clkdm->usecount) > 0)
                _clkdm_del_autodeps(clkdm);
 
 /* This is an implicit clockdomain - it is never defined as such in TRM */
 static struct clockdomain wkup_clkdm = {
        .name           = "wkup_clkdm",
-       .pwrdm_name     = "wkup_pwrdm",
+       .pwrdm          = { .name = "wkup_pwrdm" },
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430),
 };
 
 
 static struct clockdomain mpu_2420_clkdm = {
        .name           = "mpu_clkdm",
-       .pwrdm_name     = "mpu_pwrdm",
+       .pwrdm          = { .name = "mpu_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP,
        .clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK,
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
 
 static struct clockdomain iva1_2420_clkdm = {
        .name           = "iva1_clkdm",
-       .pwrdm_name     = "dsp_pwrdm",
+       .pwrdm          = { .name = "dsp_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP_SWSUP,
        .clktrctrl_mask = OMAP2420_AUTOSTATE_IVA_MASK,
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
 
 static struct clockdomain mpu_2430_clkdm = {
        .name           = "mpu_clkdm",
-       .pwrdm_name     = "mpu_pwrdm",
+       .pwrdm          = { .name = "mpu_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP_SWSUP,
        .clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK,
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 
 static struct clockdomain mdm_clkdm = {
        .name           = "mdm_clkdm",
-       .pwrdm_name     = "mdm_pwrdm",
+       .pwrdm          = { .name = "mdm_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP_SWSUP,
        .clktrctrl_mask = OMAP2430_AUTOSTATE_MDM_MASK,
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 
 static struct clockdomain dsp_clkdm = {
        .name           = "dsp_clkdm",
-       .pwrdm_name     = "dsp_pwrdm",
+       .pwrdm          = { .name = "dsp_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP_SWSUP,
        .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSP_MASK,
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX),
 
 static struct clockdomain gfx_24xx_clkdm = {
        .name           = "gfx_clkdm",
-       .pwrdm_name     = "gfx_pwrdm",
+       .pwrdm          = { .name = "gfx_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP_SWSUP,
        .clktrctrl_mask = OMAP24XX_AUTOSTATE_GFX_MASK,
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX),
 
 static struct clockdomain core_l3_24xx_clkdm = {
        .name           = "core_l3_clkdm",
-       .pwrdm_name     = "core_pwrdm",
+       .pwrdm          = { .name = "core_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP,
        .clktrctrl_mask = OMAP24XX_AUTOSTATE_L3_MASK,
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX),
 
 static struct clockdomain core_l4_24xx_clkdm = {
        .name           = "core_l4_clkdm",
-       .pwrdm_name     = "core_pwrdm",
+       .pwrdm          = { .name = "core_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP,
        .clktrctrl_mask = OMAP24XX_AUTOSTATE_L4_MASK,
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX),
 
 static struct clockdomain dss_24xx_clkdm = {
        .name           = "dss_clkdm",
-       .pwrdm_name     = "core_pwrdm",
+       .pwrdm          = { .name = "core_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP,
        .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSS_MASK,
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX),
 
 static struct clockdomain mpu_34xx_clkdm = {
        .name           = "mpu_clkdm",
-       .pwrdm_name     = "mpu_pwrdm",
+       .pwrdm          = { .name = "mpu_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP | CLKDM_CAN_FORCE_WAKEUP,
        .clktrctrl_mask = OMAP3430_CLKTRCTRL_MPU_MASK,
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 
 static struct clockdomain neon_clkdm = {
        .name           = "neon_clkdm",
-       .pwrdm_name     = "neon_pwrdm",
+       .pwrdm          = { .name = "neon_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP_SWSUP,
        .clktrctrl_mask = OMAP3430_CLKTRCTRL_NEON_MASK,
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 
 static struct clockdomain iva2_clkdm = {
        .name           = "iva2_clkdm",
-       .pwrdm_name     = "iva2_pwrdm",
+       .pwrdm          = { .name = "iva2_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP_SWSUP,
        .clktrctrl_mask = OMAP3430_CLKTRCTRL_IVA2_MASK,
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 
 static struct clockdomain gfx_3430es1_clkdm = {
        .name           = "gfx_clkdm",
-       .pwrdm_name     = "gfx_pwrdm",
+       .pwrdm          = { .name = "gfx_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP_SWSUP,
        .clktrctrl_mask = OMAP3430ES1_CLKTRCTRL_GFX_MASK,
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1),
 
 static struct clockdomain sgx_clkdm = {
        .name           = "sgx_clkdm",
-       .pwrdm_name     = "sgx_pwrdm",
+       .pwrdm          = { .name = "sgx_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP_SWSUP,
        .clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_SGX_MASK,
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2),
  */
 static struct clockdomain d2d_clkdm = {
        .name           = "d2d_clkdm",
-       .pwrdm_name     = "core_pwrdm",
+       .pwrdm          = { .name = "core_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP,
        .clktrctrl_mask = OMAP3430ES1_CLKTRCTRL_D2D_MASK,
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 
 static struct clockdomain core_l3_34xx_clkdm = {
        .name           = "core_l3_clkdm",
-       .pwrdm_name     = "core_pwrdm",
+       .pwrdm          = { .name = "core_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP,
        .clktrctrl_mask = OMAP3430_CLKTRCTRL_L3_MASK,
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 
 static struct clockdomain core_l4_34xx_clkdm = {
        .name           = "core_l4_clkdm",
-       .pwrdm_name     = "core_pwrdm",
+       .pwrdm          = { .name = "core_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP,
        .clktrctrl_mask = OMAP3430_CLKTRCTRL_L4_MASK,
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 
 static struct clockdomain dss_34xx_clkdm = {
        .name           = "dss_clkdm",
-       .pwrdm_name     = "dss_pwrdm",
+       .pwrdm          = { .name = "dss_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP_SWSUP,
        .clktrctrl_mask = OMAP3430_CLKTRCTRL_DSS_MASK,
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 
 static struct clockdomain cam_clkdm = {
        .name           = "cam_clkdm",
-       .pwrdm_name     = "cam_pwrdm",
+       .pwrdm          = { .name = "cam_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP_SWSUP,
        .clktrctrl_mask = OMAP3430_CLKTRCTRL_CAM_MASK,
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 
 static struct clockdomain usbhost_clkdm = {
        .name           = "usbhost_clkdm",
-       .pwrdm_name     = "usbhost_pwrdm",
+       .pwrdm          = { .name = "usbhost_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP_SWSUP,
        .clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_USBHOST_MASK,
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2),
 
 static struct clockdomain per_clkdm = {
        .name           = "per_clkdm",
-       .pwrdm_name     = "per_pwrdm",
+       .pwrdm          = { .name = "per_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP_SWSUP,
        .clktrctrl_mask = OMAP3430_CLKTRCTRL_PER_MASK,
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 
 static struct clockdomain emu_clkdm = {
        .name           = "emu_clkdm",
-       .pwrdm_name     = "emu_pwrdm",
+       .pwrdm          = { .name = "emu_pwrdm" },
        .flags          = CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_SWSUP,
        .clktrctrl_mask = OMAP3430_CLKTRCTRL_EMU_MASK,
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 
 static struct clkdm_pwrdm_autodep clkdm_pwrdm_autodeps[] = {
        {
-               .pwrdm_name = "mpu_pwrdm",
+               .pwrdm     = { .name = "mpu_pwrdm" },
                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
        },
        {
-               .pwrdm_name = "iva2_pwrdm",
+               .pwrdm     = { .name = "iva2_pwrdm" },
                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
        },
-       { NULL }
+       {
+               .pwrdm     = { .name = NULL },
+       }
 };
 
 /*