MXC: add RTCK alternate function definitions

This one adds definitions to configure RTCK pad (PE16) in primary and alternate
function. The RTCK Pin is used by one wire master controller and as JTAG Clock
return.

Signed-off-by: Luotao Fu <l.fu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h b/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h
index a09905e5bea1049bbca665594aeba58624228d42..3d09bfd6c53df8402a6c7033f2ba3b3805afcc3f 100644 (file)
--- a/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h
@@ -377,6 +377,8 @@ extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
 #define PE13_PF_UART1_RXD      (GPIO_PORTE | GPIO_IN  | GPIO_PF | 13)
 #define PE14_PF_UART1_CTS      (GPIO_PORTE | GPIO_OUT | GPIO_PF | 14)
 #define PE15_PF_UART1_RTS      (GPIO_PORTE | GPIO_IN  | GPIO_PF | 15)
+#define PE16_AF_RTCK           (GPIO_PORTE | GPIO_OUT | GPIO_AF | 16)
+#define PE16_PF_RTCK           (GPIO_PORTE | GPIO_OUT | GPIO_PF | 16)
 #define PE18_AF_CSPI3_MISO     (GPIO_PORTE | GPIO_IN  | GPIO_AF | 18)
 #define PE21_AF_CSPI3_SS       (GPIO_PORTE | GPIO_OUT | GPIO_AF | 21)
 #define PE22_AF_CSPI3_MOSI     (GPIO_PORTE | GPIO_OUT | GPIO_AF | 22)