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OMAP2/3 clock: encode target IDLEST bits and clean omap2_clk_wait_ready()
authorPaul Walmsley <paul@pwsan.com>
Tue, 16 Sep 2008 14:58:34 +0000 (08:58 -0600)
committerTony Lindgren <tony@atomide.com>
Mon, 22 Sep 2008 14:55:47 +0000 (17:55 +0300)
For each OMAP module that has a target IDLEST bit, add the appropriate
bits to the clock tree on both the module interface clock and the appropriate
functional clock.  Add a new clock bit, "WAIT_READY", that indicates that
the clock code must wait for the clock's module to come out of idle after
both the target functional clock and interface clocks are enabled.  Fix
some clock flag comments while there to indicate that clocks marked
as "3430ES2" clocks also are valid for later 3430 revisions.

Several OMAP3xxx clocks must be split into platform-specific variants,
since some early silicon revisions do not have target idle state bits
available. DSS, HSOTGUSB, and SSI clocks are affected.  In the future, it
would be ideal to #ifdef out those clocks for kernels that don't need to
run on 3430ES1 chips to save memory.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/mach-omap2/clock24xx.h patch | blob | history
arch/arm/mach-omap2/clock34xx.h patch | blob | history
arch/arm/mach-omap2/cm-regbits-24xx.h patch | blob | history
arch/arm/plat-omap/include/mach/clock.h patch | blob | history

diff --git a/arch/arm/mach-omap2/clock24xx.h b/arch/arm/mach-omap2/clock24xx.h
index 41f9e2cedbe2bb0e1ef8fbf94b548282a01d2fa5..f11d16e7ba3e389106516828307f021f7743c08a 100644 (file)
--- a/arch/arm/mach-omap2/clock24xx.h
+++ b/arch/arm/mach-omap2/clock24xx.h
@@ -1232,10 +1232,11 @@ static struct clk usb_l4_ick = {        /* FS-USB interface clock */
        .parent         = &core_l3_ck,
        .prcm_mod       = CORE_MOD,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
-                               DELAYED_APP | CONFIG_PARTICIPANT,
+                               DELAYED_APP | CONFIG_PARTICIPANT | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN2,
        .enable_bit     = OMAP24XX_EN_USB_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_USB_SHIFT,
        .clksel_reg     = CM_CLKSEL1,
        .clksel_mask    = OMAP24XX_CLKSEL_USB_MASK,
        .clksel         = usb_l4_ick_clksel,
@@ -1305,11 +1306,12 @@ static struct clk ssi_ssr_sst_fck = {
        .name           = "ssi_fck",
        .parent         = &core_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY |
                                DELAYED_APP,
        .clkdm          = { .name = "core_l3_clkdm" },
        .enable_reg     = OMAP24XX_CM_FCLKEN2,
        .enable_bit     = OMAP24XX_EN_SSI_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_SSI_SHIFT,
        .clksel_reg     = CM_CLKSEL1,
        .clksel_mask    = OMAP24XX_CLKSEL_SSI_MASK,
        .clksel         = ssi_ssr_sst_fck_clksel,
@@ -1327,9 +1329,10 @@ static struct clk ssi_l4_ick = {
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
        .clkdm          = { .name = "core_l4_clkdm" },
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
        .enable_reg     = CM_ICLKEN2,
        .enable_bit     = OMAP24XX_EN_SSI_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_SSI_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -1572,10 +1575,11 @@ static struct clk gpt1_ick = {
        .name           = "gpt1_ick",
        .parent         = &l4_ck,
        .prcm_mod       = WKUP_MOD,
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN,
        .enable_bit     = OMAP24XX_EN_GPT1_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_GPT1_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -1600,10 +1604,11 @@ static struct clk gpt2_ick = {
        .name           = "gpt2_ick",
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP24XX_EN_GPT2_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_GPT2_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -1626,10 +1631,11 @@ static struct clk gpt3_ick = {
        .name           = "gpt3_ick",
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP24XX_EN_GPT3_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_GPT3_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -1652,10 +1658,11 @@ static struct clk gpt4_ick = {
        .name           = "gpt4_ick",
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP24XX_EN_GPT4_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_GPT4_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -1678,10 +1685,11 @@ static struct clk gpt5_ick = {
        .name           = "gpt5_ick",
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP24XX_EN_GPT5_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_GPT5_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -1704,10 +1712,11 @@ static struct clk gpt6_ick = {
        .name           = "gpt6_ick",
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP24XX_EN_GPT6_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_GPT6_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -1730,10 +1739,11 @@ static struct clk gpt7_ick = {
        .name           = "gpt7_ick",
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP24XX_EN_GPT7_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_GPT7_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -1756,10 +1766,11 @@ static struct clk gpt8_ick = {
        .name           = "gpt8_ick",
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP24XX_EN_GPT8_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_GPT8_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -1782,10 +1793,11 @@ static struct clk gpt9_ick = {
        .name           = "gpt9_ick",
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP24XX_EN_GPT9_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_GPT9_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -1808,10 +1820,11 @@ static struct clk gpt10_ick = {
        .name           = "gpt10_ick",
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP24XX_EN_GPT10_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_GPT10_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -1834,10 +1847,11 @@ static struct clk gpt11_ick = {
        .name           = "gpt11_ick",
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP24XX_EN_GPT11_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_GPT11_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -1860,10 +1874,11 @@ static struct clk gpt12_ick = {
        .name           = "gpt12_ick",
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP24XX_EN_GPT12_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_GPT12_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -1887,10 +1902,11 @@ static struct clk mcbsp1_ick = {
        .id             = 1,
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP24XX_EN_MCBSP1_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_MCBSP1_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -1911,10 +1927,11 @@ static struct clk mcbsp2_ick = {
        .id             = 2,
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP24XX_EN_MCBSP2_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_MCBSP2_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -1935,10 +1952,11 @@ static struct clk mcbsp3_ick = {
        .id             = 3,
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN2,
        .enable_bit     = OMAP2430_EN_MCBSP3_SHIFT,
+       .idlest_bit     = OMAP2430_ST_MCBSP3_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -1959,10 +1977,11 @@ static struct clk mcbsp4_ick = {
        .id             = 4,
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN2,
        .enable_bit     = OMAP2430_EN_MCBSP4_SHIFT,
+       .idlest_bit     = OMAP2430_ST_MCBSP4_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -1983,10 +2002,11 @@ static struct clk mcbsp5_ick = {
        .id             = 5,
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN2,
        .enable_bit     = OMAP2430_EN_MCBSP5_SHIFT,
+       .idlest_bit     = OMAP2430_ST_MCBSP5_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2008,9 +2028,10 @@ static struct clk mcspi1_ick = {
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
        .clkdm          = { .name = "core_l4_clkdm" },
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP24XX_EN_MCSPI1_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_MCSPI1_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2031,10 +2052,11 @@ static struct clk mcspi2_ick = {
        .id             = 2,
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP24XX_EN_MCSPI2_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_MCSPI2_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2055,10 +2077,11 @@ static struct clk mcspi3_ick = {
        .id             = 3,
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN2,
        .enable_bit     = OMAP2430_EN_MCSPI3_SHIFT,
+       .idlest_bit     = OMAP2430_ST_MCSPI3_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2078,10 +2101,11 @@ static struct clk uart1_ick = {
        .name           = "uart1_ick",
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP24XX_EN_UART1_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_UART1_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2100,10 +2124,11 @@ static struct clk uart2_ick = {
        .name           = "uart2_ick",
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP24XX_EN_UART2_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_UART2_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2122,10 +2147,11 @@ static struct clk uart3_ick = {
        .name           = "uart3_ick",
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN2,
        .enable_bit     = OMAP24XX_EN_UART3_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_UART3_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2144,10 +2170,11 @@ static struct clk gpios_ick = {
        .name           = "gpios_ick",
        .parent         = &l4_ck,
        .prcm_mod       = WKUP_MOD,
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN,
        .enable_bit     = OMAP24XX_EN_GPIOS_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_GPIOS_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2155,10 +2182,11 @@ static struct clk gpios_fck = {
        .name           = "gpios_fck",
        .parent         = &func_32k_ck,
        .prcm_mod       = WKUP_MOD,
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "prm_clkdm" },
        .enable_reg     = CM_FCLKEN,
        .enable_bit     = OMAP24XX_EN_GPIOS_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_GPIOS_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2167,10 +2195,11 @@ static struct clk mpu_wdt_ick = {
        .name           = "mpu_wdt_ick",
        .parent         = &l4_ck,
        .prcm_mod       = WKUP_MOD,
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "prm_clkdm" },
        .enable_reg     = CM_ICLKEN,
        .enable_bit     = OMAP24XX_EN_MPU_WDT_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_MPU_WDT_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2179,10 +2208,11 @@ static struct clk mpu_wdt_fck = {
        .name           = "mpu_wdt_fck",
        .parent         = &func_32k_ck,
        .prcm_mod       = WKUP_MOD,
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "prm_clkdm" },
        .enable_reg     = CM_FCLKEN,
        .enable_bit     = OMAP24XX_EN_MPU_WDT_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_MPU_WDT_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2191,10 +2221,11 @@ static struct clk sync_32k_ick = {
        .parent         = &l4_ck,
        .prcm_mod       = WKUP_MOD,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
-                               ENABLE_ON_INIT,
+                               ENABLE_ON_INIT | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN,
        .enable_bit     = OMAP24XX_EN_32KSYNC_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_32KSYNC_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2207,6 +2238,7 @@ static struct clk wdt1_ick = {
        .clkdm          = { .name = "prm_clkdm" },
        .enable_reg     = CM_ICLKEN,
        .enable_bit     = OMAP24XX_EN_WDT1_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_WDT1_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2219,6 +2251,7 @@ static struct clk omapctrl_ick = {
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN,
        .enable_bit     = OMAP24XX_EN_OMAPCTRL_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_OMAPCTRL_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2226,10 +2259,11 @@ static struct clk icr_ick = {
        .name           = "icr_ick",
        .parent         = &l4_ck,
        .prcm_mod       = WKUP_MOD,
-       .flags          = CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN,
        .enable_bit     = OMAP2430_EN_ICR_SHIFT,
+       .idlest_bit     = OMAP2430_ST_ICR_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2264,10 +2298,11 @@ static struct clk mailboxes_ick = {
        .name           = "mailboxes_ick",
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP24XX_EN_MAILBOXES_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_MAILBOXES_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2275,10 +2310,11 @@ static struct clk wdt4_ick = {
        .name           = "wdt4_ick",
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP24XX_EN_WDT4_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_WDT4_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2297,10 +2333,11 @@ static struct clk wdt3_ick = {
        .name           = "wdt3_ick",
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X,
+       .flags          = CLOCK_IN_OMAP242X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP2420_EN_WDT3_SHIFT,
+       .idlest_bit     = OMAP2420_ST_WDT3_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2308,10 +2345,11 @@ static struct clk wdt3_fck = {
        .name           = "wdt3_fck",
        .parent         = &func_32k_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X,
+       .flags          = CLOCK_IN_OMAP242X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_FCLKEN1,
        .enable_bit     = OMAP2420_EN_WDT3_SHIFT,
+       .enable_bit     = OMAP2420_ST_WDT3_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2319,10 +2357,11 @@ static struct clk mspro_ick = {
        .name           = "mspro_ick",
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP24XX_EN_MSPRO_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_MSPRO_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2330,10 +2369,11 @@ static struct clk mspro_fck = {
        .name           = "mspro_fck",
        .parent         = &func_96m_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_FCLKEN1,
        .enable_bit     = OMAP24XX_EN_MSPRO_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_MSPRO_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2341,10 +2381,11 @@ static struct clk mmc_ick = {
        .name           = "mmc_ick",
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X,
+       .flags          = CLOCK_IN_OMAP242X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP2420_EN_MMC_SHIFT,
+       .idlest_bit     = OMAP2420_ST_MMC_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2352,10 +2393,11 @@ static struct clk mmc_fck = {
        .name           = "mmc_fck",
        .parent         = &func_96m_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X,
+       .flags          = CLOCK_IN_OMAP242X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_FCLKEN1,
        .enable_bit     = OMAP2420_EN_MMC_SHIFT,
+       .idlest_bit     = OMAP2420_ST_MMC_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2363,10 +2405,11 @@ static struct clk fac_ick = {
        .name           = "fac_ick",
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP24XX_EN_FAC_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_FAC_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2374,10 +2417,11 @@ static struct clk fac_fck = {
        .name           = "fac_fck",
        .parent         = &func_12m_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_FCLKEN1,
        .enable_bit     = OMAP24XX_EN_FAC_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_FAC_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2385,10 +2429,11 @@ static struct clk eac_ick = {
        .name           = "eac_ick",
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X,
+       .flags          = CLOCK_IN_OMAP242X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP2420_EN_EAC_SHIFT,
+       .idlest_bit     = OMAP2420_ST_EAC_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2396,10 +2441,11 @@ static struct clk eac_fck = {
        .name           = "eac_fck",
        .parent         = &func_96m_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X,
+       .flags          = CLOCK_IN_OMAP242X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_FCLKEN1,
        .enable_bit     = OMAP2420_EN_EAC_SHIFT,
+       .idlest_bit     = OMAP2420_ST_EAC_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2407,10 +2453,11 @@ static struct clk hdq_ick = {
        .name           = "hdq_ick",
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP24XX_EN_HDQ_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_HDQ_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2418,10 +2465,11 @@ static struct clk hdq_fck = {
        .name           = "hdq_fck",
        .parent         = &func_12m_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_FCLKEN1,
        .enable_bit     = OMAP24XX_EN_HDQ_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_HDQ_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2430,10 +2478,11 @@ static struct clk i2c2_ick = {
        .id             = 2,
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP2420_EN_I2C2_SHIFT,
+       .idlest_bit     = OMAP2420_ST_I2C2_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2442,10 +2491,11 @@ static struct clk i2c2_fck = {
        .id             = 2,
        .parent         = &func_12m_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X,
+       .flags          = CLOCK_IN_OMAP242X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_FCLKEN1,
        .enable_bit     = OMAP2420_EN_I2C2_SHIFT,
+       .idlest_bit     = OMAP2420_ST_I2C2_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2466,10 +2516,11 @@ static struct clk i2c1_ick = {
        .id             = 1,
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP2420_EN_I2C1_SHIFT,
+       .idlest_bit     = OMAP2420_ST_I2C1_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2478,10 +2529,11 @@ static struct clk i2c1_fck = {
        .id             = 1,
        .parent         = &func_12m_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X,
+       .flags          = CLOCK_IN_OMAP242X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_FCLKEN1,
        .enable_bit     = OMAP2420_EN_I2C1_SHIFT,
+       .idlest_bit     = OMAP2420_ST_I2C1_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2526,10 +2578,11 @@ static struct clk vlynq_ick = {
        .name           = "vlynq_ick",
        .parent         = &core_l3_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X,
+       .flags          = CLOCK_IN_OMAP242X | WAIT_READY,
        .clkdm          = { .name = "core_l3_clkdm" },
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP2420_EN_VLYNQ_SHIFT,
+       .idlest_bit     = OMAP2420_ST_VLYNQ_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2562,10 +2615,11 @@ static struct clk vlynq_fck = {
        .name           = "vlynq_fck",
        .parent         = &func_96m_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP242X | DELAYED_APP,
+       .flags          = CLOCK_IN_OMAP242X | DELAYED_APP | WAIT_READY,
        .clkdm          = { .name = "core_l3_clkdm" },
        .enable_reg     = CM_FCLKEN1,
        .enable_bit     = OMAP2420_EN_VLYNQ_SHIFT,
+       .idlest_bit     = OMAP2420_ST_VLYNQ_SHIFT,
        .init           = &omap2_init_clksel_parent,
        .clksel_reg     = CM_CLKSEL1,
        .clksel_mask    = OMAP2420_CLKSEL_VLYNQ_MASK,
@@ -2579,10 +2633,11 @@ static struct clk sdrc_ick = {
        .name           = "sdrc_ick",
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP243X | ENABLE_ON_INIT,
+       .flags          = CLOCK_IN_OMAP243X | WAIT_READY | ENABLE_ON_INIT,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN3,
        .enable_bit     = OMAP2430_EN_SDRC_SHIFT,
+       .idlest_bit     = OMAP2430_ST_SDRC_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2590,10 +2645,11 @@ static struct clk des_ick = {
        .name           = "des_ick",
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X,
+       .flags          = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = OMAP24XX_CM_ICLKEN4,
        .enable_bit     = OMAP24XX_EN_DES_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_DES_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2601,10 +2657,11 @@ static struct clk sha_ick = {
        .name           = "sha_ick",
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X,
+       .flags          = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = OMAP24XX_CM_ICLKEN4,
        .enable_bit     = OMAP24XX_EN_SHA_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_SHA_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2612,10 +2669,11 @@ static struct clk rng_ick = {
        .name           = "rng_ick",
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X,
+       .flags          = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = OMAP24XX_CM_ICLKEN4,
        .enable_bit     = OMAP24XX_EN_RNG_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_RNG_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2623,10 +2681,11 @@ static struct clk aes_ick = {
        .name           = "aes_ick",
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X,
+       .flags          = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = OMAP24XX_CM_ICLKEN4,
        .enable_bit     = OMAP24XX_EN_AES_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_AES_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2634,10 +2693,11 @@ static struct clk pka_ick = {
        .name           = "pka_ick",
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X,
+       .flags          = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = OMAP24XX_CM_ICLKEN4,
        .enable_bit     = OMAP24XX_EN_PKA_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_PKA_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2645,10 +2705,11 @@ static struct clk usb_fck = {
        .name           = "usb_fck",
        .parent         = &func_48m_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X,
+       .flags          = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X | WAIT_READY,
        .clkdm          = { .name = "core_l3_clkdm" },
        .enable_reg     = OMAP24XX_CM_FCLKEN2,
        .enable_bit     = OMAP24XX_EN_USB_SHIFT,
+       .idlest_bit     = OMAP24XX_ST_USB_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2656,10 +2717,11 @@ static struct clk usbhs_ick = {
        .name           = "usbhs_ick",
        .parent         = &core_l3_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l3_clkdm" },
        .enable_reg     = CM_ICLKEN2,
        .enable_bit     = OMAP2430_EN_USBHS_SHIFT,
+       .idlest_bit     = OMAP2430_ST_USBHS_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2668,10 +2730,11 @@ static struct clk mmchs1_ick = {
        .id             = 1,
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN2,
        .enable_bit     = OMAP2430_EN_MMCHS1_SHIFT,
+       .idlest_bit     = OMAP2430_ST_MMCHS1_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2692,10 +2755,11 @@ static struct clk mmchs2_ick = {
        .id             = 2,
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN2,
        .enable_bit     = OMAP2430_EN_MMCHS2_SHIFT,
+       .idlest_bit     = OMAP2430_ST_MMCHS2_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2715,10 +2779,11 @@ static struct clk gpio5_ick = {
        .name           = "gpio5_ick",
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN2,
        .enable_bit     = OMAP2430_EN_GPIO5_SHIFT,
+       .idlest_bit     = OMAP2430_ST_GPIO5_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
@@ -2737,10 +2802,11 @@ static struct clk mdm_intc_ick = {
        .name           = "mdm_intc_ick",
        .parent         = &l4_ck,
        .prcm_mod       = CORE_MOD,
-       .flags          = CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP243X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .enable_reg     = CM_ICLKEN2,
        .enable_bit     = OMAP2430_EN_MDM_INTC_SHIFT,
+       .idlest_bit     = OMAP2430_ST_MDM_INTC_SHIFT,
        .recalc         = &followparent_recalc,
 };
 
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index ccdd3f2476fa1cec27147d7cfea5ae9a0fdfe16b..3e51461aa23d41e2a1592ce77b1291aebd0b521c 100644 (file)
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -1338,10 +1338,11 @@ static struct clk gpt10_fck = {
        .init           = &omap2_init_clksel_parent,
        .enable_reg     = CM_FCLKEN1,
        .enable_bit     = OMAP3430_EN_GPT10_SHIFT,
+       .idlest_bit     = OMAP3430_ST_GPT10_SHIFT,
        .clksel_reg     = CM_CLKSEL,
        .clksel_mask    = OMAP3430_CLKSEL_GPT10_MASK,
        .clksel         = omap343x_gpt_clksel,
-       .flags          = CLOCK_IN_OMAP343X,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &omap2_clksel_recalc,
 };
@@ -1353,10 +1354,11 @@ static struct clk gpt11_fck = {
        .init           = &omap2_init_clksel_parent,
        .enable_reg     = CM_FCLKEN1,
        .enable_bit     = OMAP3430_EN_GPT11_SHIFT,
+       .idlest_bit     = OMAP3430_ST_GPT11_SHIFT,
        .clksel_reg     = CM_CLKSEL,
        .clksel_mask    = OMAP3430_CLKSEL_GPT11_MASK,
        .clksel         = omap343x_gpt_clksel,
-       .flags          = CLOCK_IN_OMAP343X,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &omap2_clksel_recalc,
 };
@@ -1367,7 +1369,8 @@ static struct clk cpefuse_fck = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = OMAP3430ES2_CM_FCLKEN3,
        .enable_bit     = OMAP3430ES2_EN_CPEFUSE_SHIFT,
-       .flags          = CLOCK_IN_OMAP3430ES2,
+       .idlest_bit     = OMAP3430ES2_ST_CPEFUSE_SHIFT,
+       .flags          = CLOCK_IN_OMAP3430ES2 | WAIT_READY,
        .clkdm          = { .name = "cm_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1389,7 +1392,8 @@ static struct clk usbtll_fck = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = OMAP3430ES2_CM_FCLKEN3,
        .enable_bit     = OMAP3430ES2_EN_USBTLL_SHIFT,
-       .flags          = CLOCK_IN_OMAP3430ES2,
+       .idlest_bit     = OMAP3430ES2_ST_USBTLL_SHIFT,
+       .flags          = CLOCK_IN_OMAP3430ES2 | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1412,7 +1416,8 @@ static struct clk mmchs3_fck = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_FCLKEN1,
        .enable_bit     = OMAP3430ES2_EN_MMC3_SHIFT,
-       .flags          = CLOCK_IN_OMAP3430ES2,
+       .idlest_bit     = OMAP3430ES2_ST_MMC3_SHIFT,
+       .flags          = CLOCK_IN_OMAP3430ES2 | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1424,7 +1429,8 @@ static struct clk mmchs2_fck = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_FCLKEN1,
        .enable_bit     = OMAP3430_EN_MMC2_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_MMC2_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1435,7 +1441,8 @@ static struct clk mspro_fck = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_FCLKEN1,
        .enable_bit     = OMAP3430_EN_MSPRO_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_MSPRO_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1447,7 +1454,8 @@ static struct clk mmchs1_fck = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_FCLKEN1,
        .enable_bit     = OMAP3430_EN_MMC1_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_MMC1_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1459,7 +1467,8 @@ static struct clk i2c3_fck = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_FCLKEN1,
        .enable_bit     = OMAP3430_EN_I2C3_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_I2C3_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1471,7 +1480,8 @@ static struct clk i2c2_fck = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_FCLKEN1,
        .enable_bit     = OMAP3430_EN_I2C2_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_I2C2_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1483,7 +1493,8 @@ static struct clk i2c1_fck = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_FCLKEN1,
        .enable_bit     = OMAP3430_EN_I2C1_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_I2C1_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1528,7 +1539,8 @@ static struct clk mcbsp5_fck = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_FCLKEN1,
        .enable_bit     = OMAP3430_EN_MCBSP5_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_MCBSP5_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1553,7 +1565,8 @@ static struct clk mcbsp1_fck = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_FCLKEN1,
        .enable_bit     = OMAP3430_EN_MCBSP1_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_MCBSP1_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1576,7 +1589,8 @@ static struct clk mcspi4_fck = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_FCLKEN1,
        .enable_bit     = OMAP3430_EN_MCSPI4_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_MCSPI4_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1588,7 +1602,8 @@ static struct clk mcspi3_fck = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_FCLKEN1,
        .enable_bit     = OMAP3430_EN_MCSPI3_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_MCSPI3_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1600,7 +1615,8 @@ static struct clk mcspi2_fck = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_FCLKEN1,
        .enable_bit     = OMAP3430_EN_MCSPI2_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_MCSPI2_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1612,7 +1628,8 @@ static struct clk mcspi1_fck = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_FCLKEN1,
        .enable_bit     = OMAP3430_EN_MCSPI1_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_MCSPI1_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1623,7 +1640,8 @@ static struct clk uart2_fck = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_FCLKEN1,
        .enable_bit     = OMAP3430_EN_UART2_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_UART2_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1634,18 +1652,21 @@ static struct clk uart1_fck = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_FCLKEN1,
        .enable_bit     = OMAP3430_EN_UART1_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_UART1_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
 
+/* XXX doublecheck: is this idle or standby? */
 static struct clk fshostusb_fck = {
        .name           = "fshostusb_fck",
        .parent         = &core_48m_fck,
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_FCLKEN1,
        .enable_bit     = OMAP3430ES1_EN_FSHOSTUSB_SHIFT,
-       .flags          = CLOCK_IN_OMAP3430ES1,
+       .idlest_bit     = OMAP3430ES1_ST_FSHOSTUSB_SHIFT,
+       .flags          = CLOCK_IN_OMAP3430ES1 | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1667,7 +1688,8 @@ static struct clk hdq_fck = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_FCLKEN1,
        .enable_bit     = OMAP3430_EN_HDQ_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_HDQ_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1689,7 +1711,7 @@ static const struct clksel ssi_ssr_clksel[] = {
        { .parent = NULL }
 };
 
-static struct clk ssi_ssr_fck = {
+static struct clk ssi_ssr_fck_3430es1 = {
        .name           = "ssi_ssr_fck",
        .init           = &omap2_init_clksel_parent,
        .prcm_mod       = CORE_MOD,
@@ -1698,16 +1720,41 @@ static struct clk ssi_ssr_fck = {
        .clksel_reg     = CM_CLKSEL,
        .clksel_mask    = OMAP3430_CLKSEL_SSI_MASK,
        .clksel         = ssi_ssr_clksel,
-       .flags          = CLOCK_IN_OMAP343X | RATE_PROPAGATES,
+       .flags          = CLOCK_IN_OMAP3430ES1 | RATE_PROPAGATES,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &omap2_clksel_recalc,
 };
 
-static struct clk ssi_sst_fck = {
+static struct clk ssi_ssr_fck_3430es2 = {
+       .name           = "ssi_ssr_fck",
+       .init           = &omap2_init_clksel_parent,
+       .prcm_mod       = CORE_MOD,
+       .enable_reg     = CM_FCLKEN1,
+       .enable_bit     = OMAP3430_EN_SSI_SHIFT,
+       .idlest_bit     = OMAP3430ES2_ST_SSI_IDLE_SHIFT,
+       .clksel_reg     = CM_CLKSEL,
+       .clksel_mask    = OMAP3430_CLKSEL_SSI_MASK,
+       .clksel         = ssi_ssr_clksel,
+       .flags          = CLOCK_IN_OMAP3430ES2 | RATE_PROPAGATES | WAIT_READY,
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .recalc         = &omap2_clksel_recalc,
+};
+
+/* It's unfortunate that we need to duplicate this clock. */
+static struct clk ssi_sst_fck_3430es1 = {
        .name           = "ssi_sst_fck",
-       .parent         = &ssi_ssr_fck,
+       .parent         = &ssi_ssr_fck_3430es1,
        .fixed_div      = 2,
-       .flags          = CLOCK_IN_OMAP343X | PARENT_CONTROLS_CLOCK,
+       .flags          = CLOCK_IN_OMAP3430ES1 | PARENT_CONTROLS_CLOCK,
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .recalc         = &omap2_fixed_divisor_recalc,
+};
+
+static struct clk ssi_sst_fck_3430es2 = {
+       .name           = "ssi_sst_fck",
+       .parent         = &ssi_ssr_fck_3430es2,
+       .fixed_div      = 2,
+       .flags          = CLOCK_IN_OMAP3430ES2 | PARENT_CONTROLS_CLOCK,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &omap2_fixed_divisor_recalc,
 };
@@ -1729,13 +1776,25 @@ static struct clk core_l3_ick = {
        .recalc         = &followparent_recalc,
 };
 
-static struct clk hsotgusb_ick = {
+static struct clk hsotgusb_ick_3430es1 = {
        .name           = "hsotgusb_ick",
        .parent         = &core_l3_ick,
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP3430_EN_HSOTGUSB_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .flags          = CLOCK_IN_OMAP3430ES1,
+       .clkdm          = { .name = "core_l3_clkdm" },
+       .recalc         = &followparent_recalc,
+};
+
+static struct clk hsotgusb_ick_3430es2 = {
+       .name           = "hsotgusb_ick",
+       .parent         = &core_l3_ick,
+       .prcm_mod       = CORE_MOD,
+       .enable_reg     = CM_ICLKEN1,
+       .enable_bit     = OMAP3430_EN_HSOTGUSB_SHIFT,
+       .idlest_bit     = OMAP3430ES2_ST_HSOTGUSB_IDLE_SHIFT,
+       .flags          = CLOCK_IN_OMAP3430ES2 | WAIT_READY,
        .clkdm          = { .name = "core_l3_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1746,7 +1805,8 @@ static struct clk sdrc_ick = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP3430_EN_SDRC_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X | ENABLE_ON_INIT,
+       .idlest_bit     = OMAP3430_ST_SDRC_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | ENABLE_ON_INIT | WAIT_READY,
        .clkdm          = { .name = "core_l3_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1777,7 +1837,8 @@ static struct clk pka_ick = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_ICLKEN2,
        .enable_bit     = OMAP3430_EN_PKA_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_PKA_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l3_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1799,7 +1860,8 @@ static struct clk usbtll_ick = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_ICLKEN3,
        .enable_bit     = OMAP3430ES2_EN_USBTLL_SHIFT,
-       .flags          = CLOCK_IN_OMAP3430ES2,
+       .idlest_bit     = OMAP3430ES2_ST_USBTLL_SHIFT,
+       .flags          = CLOCK_IN_OMAP3430ES2 | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1811,7 +1873,8 @@ static struct clk mmchs3_ick = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP3430ES2_EN_MMC3_SHIFT,
-       .flags          = CLOCK_IN_OMAP3430ES2,
+       .idlest_bit     = OMAP3430ES2_ST_MMC3_SHIFT,
+       .flags          = CLOCK_IN_OMAP3430ES2 | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1823,7 +1886,8 @@ static struct clk icr_ick = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP3430_EN_ICR_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_ICR_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1834,7 +1898,8 @@ static struct clk aes2_ick = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP3430_EN_AES2_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_AES2_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1845,7 +1910,8 @@ static struct clk sha12_ick = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP3430_EN_SHA12_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_SHA12_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1856,7 +1922,8 @@ static struct clk des2_ick = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP3430_EN_DES2_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_DES2_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1868,7 +1935,8 @@ static struct clk mmchs2_ick = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP3430_EN_MMC2_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_MMC2_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1880,7 +1948,8 @@ static struct clk mmchs1_ick = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP3430_EN_MMC1_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_MMC1_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1891,7 +1960,8 @@ static struct clk mspro_ick = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP3430_EN_MSPRO_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_MSPRO_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1902,7 +1972,8 @@ static struct clk hdq_ick = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP3430_EN_HDQ_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_HDQ_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1914,7 +1985,8 @@ static struct clk mcspi4_ick = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP3430_EN_MCSPI4_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_MCSPI4_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1926,7 +1998,8 @@ static struct clk mcspi3_ick = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP3430_EN_MCSPI3_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_MCSPI3_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1938,7 +2011,8 @@ static struct clk mcspi2_ick = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP3430_EN_MCSPI2_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_MCSPI2_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1950,7 +2024,8 @@ static struct clk mcspi1_ick = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP3430_EN_MCSPI1_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_MCSPI1_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1962,7 +2037,8 @@ static struct clk i2c3_ick = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP3430_EN_I2C3_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_I2C3_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1974,7 +2050,8 @@ static struct clk i2c2_ick = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP3430_EN_I2C2_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_I2C2_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1986,7 +2063,8 @@ static struct clk i2c1_ick = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP3430_EN_I2C1_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_I2C1_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -1997,7 +2075,8 @@ static struct clk uart2_ick = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP3430_EN_UART2_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_UART2_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2008,7 +2087,8 @@ static struct clk uart1_ick = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP3430_EN_UART1_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_UART1_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2019,7 +2099,8 @@ static struct clk gpt11_ick = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP3430_EN_GPT11_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_GPT11_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2030,7 +2111,8 @@ static struct clk gpt10_ick = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP3430_EN_GPT10_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_GPT10_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2042,7 +2124,8 @@ static struct clk mcbsp5_ick = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP3430_EN_MCBSP5_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_MCBSP5_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2054,7 +2137,8 @@ static struct clk mcbsp1_ick = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP3430_EN_MCBSP1_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_MCBSP1_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2065,7 +2149,8 @@ static struct clk fac_ick = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP3430ES1_EN_FAC_SHIFT,
-       .flags          = CLOCK_IN_OMAP3430ES1,
+       .idlest_bit     = OMAP3430ES1_ST_FAC_SHIFT,
+       .flags          = CLOCK_IN_OMAP3430ES1 | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2076,7 +2161,8 @@ static struct clk mailboxes_ick = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP3430_EN_MAILBOXES_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_MAILBOXES_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2087,7 +2173,8 @@ static struct clk omapctrl_ick = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP3430_EN_OMAPCTRL_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X | ENABLE_ON_INIT,
+       .idlest_bit     = OMAP3430_ST_OMAPCTRL_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | ENABLE_ON_INIT | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2103,20 +2190,33 @@ static struct clk ssi_l4_ick = {
        .recalc         = &followparent_recalc,
 };
 
-static struct clk ssi_ick = {
+static struct clk ssi_ick_3430es1 = {
        .name           = "ssi_ick",
        .parent         = &ssi_l4_ick,
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP3430_EN_SSI_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .flags          = CLOCK_IN_OMAP3430ES1,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
 
-/* REVISIT: Technically the TRM claims that this is CORE_CLK based,
- * but l4_ick makes more sense to me */
+static struct clk ssi_ick_3430es2 = {
+       .name           = "ssi_ick",
+       .parent         = &ssi_l4_ick,
+       .prcm_mod       = CORE_MOD,
+       .enable_reg     = CM_ICLKEN1,
+       .enable_bit     = OMAP3430_EN_SSI_SHIFT,
+       .idlest_bit     = OMAP3430ES2_ST_SSI_IDLE_SHIFT,
+       .flags          = CLOCK_IN_OMAP3430ES2 | WAIT_READY,
+       .clkdm          = { .name = "core_l4_clkdm" },
+       .recalc         = &followparent_recalc,
+};
 
+/*
+ * REVISIT: Technically the TRM claims that this is CORE_CLK based,
+ * but l4_ick makes more sense to me
+ */
 static const struct clksel usb_l4_clksel[] = {
        { .parent = &l4_ick, .rates = div2_rates },
        { .parent = NULL },
@@ -2129,10 +2229,11 @@ static struct clk usb_l4_ick = {
        .init           = &omap2_init_clksel_parent,
        .enable_reg     = CM_ICLKEN1,
        .enable_bit     = OMAP3430ES1_EN_FSHOSTUSB_SHIFT,
+       .idlest_bit     = OMAP3430ES1_ST_FSHOSTUSB_SHIFT,
        .clksel_reg     = CM_CLKSEL,
        .clksel_mask    = OMAP3430ES1_CLKSEL_FSHOSTUSB_MASK,
        .clksel         = usb_l4_clksel,
-       .flags          = CLOCK_IN_OMAP3430ES1,
+       .flags          = CLOCK_IN_OMAP3430ES1 | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &omap2_clksel_recalc,
 };
@@ -2156,7 +2257,8 @@ static struct clk aes1_ick = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_ICLKEN2,
        .enable_bit     = OMAP3430_EN_AES1_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_AES1_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2167,7 +2269,8 @@ static struct clk rng_ick = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_ICLKEN2,
        .enable_bit     = OMAP3430_EN_RNG_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_RNG_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2178,7 +2281,8 @@ static struct clk sha11_ick = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_ICLKEN2,
        .enable_bit     = OMAP3430_EN_SHA11_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_SHA11_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2189,13 +2293,14 @@ static struct clk des1_ick = {
        .prcm_mod       = CORE_MOD,
        .enable_reg     = CM_ICLKEN2,
        .enable_bit     = OMAP3430_EN_DES1_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_DES1_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "core_l4_clkdm" },
        .recalc         = &followparent_recalc,
 };
 
 /* DSS */
-static struct clk dss1_alwon_fck = {
+static struct clk dss1_alwon_fck_3430es1 = {
        .name           = "dss1_alwon_fck",
        .parent         = &dpll4_m4x2_ck,
        .prcm_mod       = OMAP3430_DSS_MOD,
@@ -2206,6 +2311,19 @@ static struct clk dss1_alwon_fck = {
        .recalc         = &followparent_recalc,
 };
 
+static struct clk dss1_alwon_fck_3430es2 = {
+       .name           = "dss1_alwon_fck",
+       .parent         = &dpll4_m4x2_ck,
+       .init           = &omap2_init_clksel_parent,
+       .prcm_mod       = OMAP3430_DSS_MOD,
+       .enable_reg     = CM_FCLKEN,
+       .enable_bit     = OMAP3430_EN_DSS1_SHIFT,
+       .idlest_bit     = OMAP3430ES2_ST_DSS_IDLE_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
+       .clkdm          = { .name = "dss_clkdm" },
+       .recalc         = &followparent_recalc,
+};
+
 static struct clk dss_tv_fck = {
        .name           = "dss_tv_fck",
        .parent         = &omap_54m_fck,
@@ -2239,14 +2357,27 @@ static struct clk dss2_alwon_fck = {
        .recalc         = &followparent_recalc,
 };
 
-static struct clk dss_ick = {
+static struct clk dss_ick_3430es1 = {
        /* Handles both L3 and L4 clocks */
        .name           = "dss_ick",
        .parent         = &l4_ick,
        .prcm_mod       = OMAP3430_DSS_MOD,
        .enable_reg     = CM_ICLKEN,
        .enable_bit     = OMAP3430_CM_ICLKEN_DSS_EN_DSS_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .flags          = CLOCK_IN_OMAP3430ES1,
+       .clkdm          = { .name = "dss_clkdm" },
+       .recalc         = &followparent_recalc,
+};
+
+static struct clk dss_ick_3430es2 = {
+       /* Handles both L3 and L4 clocks */
+       .name           = "dss_ick",
+       .parent         = &l4_ick,
+       .prcm_mod       = OMAP3430_DSS_MOD,
+       .enable_reg     = CM_ICLKEN,
+       .enable_bit     = OMAP3430_CM_ICLKEN_DSS_EN_DSS_SHIFT,
+       .idlest_bit     = OMAP3430ES2_ST_DSS_IDLE_SHIFT,
+       .flags          = CLOCK_IN_OMAP3430ES2 | WAIT_READY,
        .clkdm          = { .name = "dss_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2306,7 +2437,8 @@ static struct clk usbhost_48m_fck = {
        .prcm_mod       = OMAP3430ES2_USBHOST_MOD,
        .enable_reg     = CM_FCLKEN,
        .enable_bit     = OMAP3430ES2_EN_USBHOST1_SHIFT,
-       .flags          = CLOCK_IN_OMAP3430ES2,
+       .idlest_bit     = OMAP3430ES2_ST_USBHOST_IDLE_SHIFT,
+       .flags          = CLOCK_IN_OMAP3430ES2 | WAIT_READY,
        .clkdm          = { .name = "usbhost_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2318,7 +2450,8 @@ static struct clk usbhost_ick = {
        .prcm_mod       = OMAP3430ES2_USBHOST_MOD,
        .enable_reg     = CM_ICLKEN,
        .enable_bit     = OMAP3430ES2_EN_USBHOST_SHIFT,
-       .flags          = CLOCK_IN_OMAP3430ES2,
+       .idlest_bit     = OMAP3430ES2_ST_USBHOST_IDLE_SHIFT,
+       .flags          = CLOCK_IN_OMAP3430ES2 | WAIT_READY,
        .clkdm          = { .name = "usbhost_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2370,10 +2503,11 @@ static struct clk gpt1_fck = {
        .init           = &omap2_init_clksel_parent,
        .enable_reg     = CM_FCLKEN,
        .enable_bit     = OMAP3430_EN_GPT1_SHIFT,
+       .idlest_bit     = OMAP3430_ST_GPT1_SHIFT,
        .clksel_reg     = CM_CLKSEL,
        .clksel_mask    = OMAP3430_CLKSEL_GPT1_MASK,
        .clksel         = omap343x_gpt_clksel,
-       .flags          = CLOCK_IN_OMAP343X,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "prm_clkdm" },
        .recalc         = &omap2_clksel_recalc,
 };
@@ -2392,7 +2526,8 @@ static struct clk gpio1_fck = {
        .prcm_mod       = WKUP_MOD,
        .enable_reg     = CM_FCLKEN,
        .enable_bit     = OMAP3430_EN_GPIO1_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_GPIO1_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "prm_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2403,7 +2538,8 @@ static struct clk wdt2_fck = {
        .prcm_mod       = WKUP_MOD,
        .enable_reg     = CM_FCLKEN,
        .enable_bit     = OMAP3430_EN_WDT2_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_WDT2_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "prm_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2435,7 +2571,8 @@ static struct clk wdt2_ick = {
        .prcm_mod       = WKUP_MOD,
        .enable_reg     = CM_ICLKEN,
        .enable_bit     = OMAP3430_EN_WDT2_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_WDT2_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "prm_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2446,7 +2583,8 @@ static struct clk wdt1_ick = {
        .prcm_mod       = WKUP_MOD,
        .enable_reg     = CM_ICLKEN,
        .enable_bit     = OMAP3430_EN_WDT1_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_WDT1_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "prm_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2457,7 +2595,8 @@ static struct clk gpio1_ick = {
        .prcm_mod       = WKUP_MOD,
        .enable_reg     = CM_ICLKEN,
        .enable_bit     = OMAP3430_EN_GPIO1_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_GPIO1_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "prm_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2468,7 +2607,8 @@ static struct clk omap_32ksync_ick = {
        .prcm_mod       = WKUP_MOD,
        .enable_reg     = CM_ICLKEN,
        .enable_bit     = OMAP3430_EN_32KSYNC_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_32KSYNC_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "prm_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2479,7 +2619,8 @@ static struct clk gpt12_ick = {
        .prcm_mod       = WKUP_MOD,
        .enable_reg     = CM_ICLKEN,
        .enable_bit     = OMAP3430_EN_GPT12_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_GPT12_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "prm_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2490,7 +2631,8 @@ static struct clk gpt1_ick = {
        .prcm_mod       = WKUP_MOD,
        .enable_reg     = CM_ICLKEN,
        .enable_bit     = OMAP3430_EN_GPT1_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_GPT1_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "prm_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2523,7 +2665,8 @@ static struct clk uart3_fck = {
        .prcm_mod       = OMAP3430_PER_MOD,
        .enable_reg     = CM_FCLKEN,
        .enable_bit     = OMAP3430_EN_UART3_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_UART3_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "per_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2534,10 +2677,11 @@ static struct clk gpt2_fck = {
        .init           = &omap2_init_clksel_parent,
        .enable_reg     = CM_FCLKEN,
        .enable_bit     = OMAP3430_EN_GPT2_SHIFT,
+       .idlest_bit     = OMAP3430_ST_GPT2_SHIFT,
        .clksel_reg     = CM_CLKSEL,
        .clksel_mask    = OMAP3430_CLKSEL_GPT2_MASK,
        .clksel         = omap343x_gpt_clksel,
-       .flags          = CLOCK_IN_OMAP343X,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "per_clkdm" },
        .recalc         = &omap2_clksel_recalc,
 };
@@ -2548,10 +2692,11 @@ static struct clk gpt3_fck = {
        .init           = &omap2_init_clksel_parent,
        .enable_reg     = CM_FCLKEN,
        .enable_bit     = OMAP3430_EN_GPT3_SHIFT,
+       .idlest_bit     = OMAP3430_ST_GPT3_SHIFT,
        .clksel_reg     = CM_CLKSEL,
        .clksel_mask    = OMAP3430_CLKSEL_GPT3_MASK,
        .clksel         = omap343x_gpt_clksel,
-       .flags          = CLOCK_IN_OMAP343X,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "per_clkdm" },
        .recalc         = &omap2_clksel_recalc,
 };
@@ -2562,10 +2707,11 @@ static struct clk gpt4_fck = {
        .init           = &omap2_init_clksel_parent,
        .enable_reg     = CM_FCLKEN,
        .enable_bit     = OMAP3430_EN_GPT4_SHIFT,
+       .idlest_bit     = OMAP3430_ST_GPT4_SHIFT,
        .clksel_reg     = CM_CLKSEL,
        .clksel_mask    = OMAP3430_CLKSEL_GPT4_MASK,
        .clksel         = omap343x_gpt_clksel,
-       .flags          = CLOCK_IN_OMAP343X,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "per_clkdm" },
        .recalc         = &omap2_clksel_recalc,
 };
@@ -2576,10 +2722,11 @@ static struct clk gpt5_fck = {
        .init           = &omap2_init_clksel_parent,
        .enable_reg     = CM_FCLKEN,
        .enable_bit     = OMAP3430_EN_GPT5_SHIFT,
+       .idlest_bit     = OMAP3430_ST_GPT5_SHIFT,
        .clksel_reg     = CM_CLKSEL,
        .clksel_mask    = OMAP3430_CLKSEL_GPT5_MASK,
        .clksel         = omap343x_gpt_clksel,
-       .flags          = CLOCK_IN_OMAP343X,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "per_clkdm" },
        .recalc         = &omap2_clksel_recalc,
 };
@@ -2590,10 +2737,11 @@ static struct clk gpt6_fck = {
        .init           = &omap2_init_clksel_parent,
        .enable_reg     = CM_FCLKEN,
        .enable_bit     = OMAP3430_EN_GPT6_SHIFT,
+       .idlest_bit     = OMAP3430_ST_GPT6_SHIFT,
        .clksel_reg     = CM_CLKSEL,
        .clksel_mask    = OMAP3430_CLKSEL_GPT6_MASK,
        .clksel         = omap343x_gpt_clksel,
-       .flags          = CLOCK_IN_OMAP343X,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "per_clkdm" },
        .recalc         = &omap2_clksel_recalc,
 };
@@ -2604,10 +2752,11 @@ static struct clk gpt7_fck = {
        .init           = &omap2_init_clksel_parent,
        .enable_reg     = CM_FCLKEN,
        .enable_bit     = OMAP3430_EN_GPT7_SHIFT,
+       .idlest_bit     = OMAP3430_ST_GPT7_SHIFT,
        .clksel_reg     = CM_CLKSEL,
        .clksel_mask    = OMAP3430_CLKSEL_GPT7_MASK,
        .clksel         = omap343x_gpt_clksel,
-       .flags          = CLOCK_IN_OMAP343X,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "per_clkdm" },
        .recalc         = &omap2_clksel_recalc,
 };
@@ -2618,10 +2767,11 @@ static struct clk gpt8_fck = {
        .init           = &omap2_init_clksel_parent,
        .enable_reg     = CM_FCLKEN,
        .enable_bit     = OMAP3430_EN_GPT8_SHIFT,
+       .idlest_bit     = OMAP3430_ST_GPT8_SHIFT,
        .clksel_reg     = CM_CLKSEL,
        .clksel_mask    = OMAP3430_CLKSEL_GPT8_MASK,
        .clksel         = omap343x_gpt_clksel,
-       .flags          = CLOCK_IN_OMAP343X,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "per_clkdm" },
        .recalc         = &omap2_clksel_recalc,
 };
@@ -2632,10 +2782,11 @@ static struct clk gpt9_fck = {
        .init           = &omap2_init_clksel_parent,
        .enable_reg     = CM_FCLKEN,
        .enable_bit     = OMAP3430_EN_GPT9_SHIFT,
+       .idlest_bit     = OMAP3430_ST_GPT9_SHIFT,
        .clksel_reg     = CM_CLKSEL,
        .clksel_mask    = OMAP3430_CLKSEL_GPT9_MASK,
        .clksel         = omap343x_gpt_clksel,
-       .flags          = CLOCK_IN_OMAP343X,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "per_clkdm" },
        .recalc         = &omap2_clksel_recalc,
 };
@@ -2654,7 +2805,8 @@ static struct clk gpio6_fck = {
        .prcm_mod       = OMAP3430_PER_MOD,
        .enable_reg     = CM_FCLKEN,
        .enable_bit     = OMAP3430_EN_GPIO6_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_GPIO6_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "per_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2665,7 +2817,8 @@ static struct clk gpio5_fck = {
        .prcm_mod       = OMAP3430_PER_MOD,
        .enable_reg     = CM_FCLKEN,
        .enable_bit     = OMAP3430_EN_GPIO5_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_GPIO5_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "per_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2676,7 +2829,8 @@ static struct clk gpio4_fck = {
        .prcm_mod       = OMAP3430_PER_MOD,
        .enable_reg     = CM_FCLKEN,
        .enable_bit     = OMAP3430_EN_GPIO4_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_GPIO4_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "per_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2687,7 +2841,8 @@ static struct clk gpio3_fck = {
        .prcm_mod       = OMAP3430_PER_MOD,
        .enable_reg     = CM_FCLKEN,
        .enable_bit     = OMAP3430_EN_GPIO3_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_GPIO3_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "per_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2698,7 +2853,8 @@ static struct clk gpio2_fck = {
        .prcm_mod       = OMAP3430_PER_MOD,
        .enable_reg     = CM_FCLKEN,
        .enable_bit     = OMAP3430_EN_GPIO2_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_GPIO2_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "per_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2709,7 +2865,8 @@ static struct clk wdt3_fck = {
        .prcm_mod       = OMAP3430_PER_MOD,
        .enable_reg     = CM_FCLKEN,
        .enable_bit     = OMAP3430_EN_WDT3_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_WDT3_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "per_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2729,7 +2886,8 @@ static struct clk gpio6_ick = {
        .prcm_mod       = OMAP3430_PER_MOD,
        .enable_reg     = CM_ICLKEN,
        .enable_bit     = OMAP3430_EN_GPIO6_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_GPIO6_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "per_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2740,7 +2898,8 @@ static struct clk gpio5_ick = {
        .prcm_mod       = OMAP3430_PER_MOD,
        .enable_reg     = CM_ICLKEN,
        .enable_bit     = OMAP3430_EN_GPIO5_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_GPIO5_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "per_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2751,7 +2910,8 @@ static struct clk gpio4_ick = {
        .prcm_mod       = OMAP3430_PER_MOD,
        .enable_reg     = CM_ICLKEN,
        .enable_bit     = OMAP3430_EN_GPIO4_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_GPIO4_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "per_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2762,7 +2922,8 @@ static struct clk gpio3_ick = {
        .prcm_mod       = OMAP3430_PER_MOD,
        .enable_reg     = CM_ICLKEN,
        .enable_bit     = OMAP3430_EN_GPIO3_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_GPIO3_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "per_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2773,7 +2934,8 @@ static struct clk gpio2_ick = {
        .prcm_mod       = OMAP3430_PER_MOD,
        .enable_reg     = CM_ICLKEN,
        .enable_bit     = OMAP3430_EN_GPIO2_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_GPIO2_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "per_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2784,7 +2946,8 @@ static struct clk wdt3_ick = {
        .prcm_mod       = OMAP3430_PER_MOD,
        .enable_reg     = CM_ICLKEN,
        .enable_bit     = OMAP3430_EN_WDT3_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_WDT3_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "per_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2795,7 +2958,8 @@ static struct clk uart3_ick = {
        .prcm_mod       = OMAP3430_PER_MOD,
        .enable_reg     = CM_ICLKEN,
        .enable_bit     = OMAP3430_EN_UART3_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_UART3_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "per_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2806,7 +2970,8 @@ static struct clk gpt9_ick = {
        .prcm_mod       = OMAP3430_PER_MOD,
        .enable_reg     = CM_ICLKEN,
        .enable_bit     = OMAP3430_EN_GPT9_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_GPT9_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "per_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2817,7 +2982,8 @@ static struct clk gpt8_ick = {
        .prcm_mod       = OMAP3430_PER_MOD,
        .enable_reg     = CM_ICLKEN,
        .enable_bit     = OMAP3430_EN_GPT8_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_GPT8_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "per_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2828,7 +2994,8 @@ static struct clk gpt7_ick = {
        .prcm_mod       = OMAP3430_PER_MOD,
        .enable_reg     = CM_ICLKEN,
        .enable_bit     = OMAP3430_EN_GPT7_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_GPT7_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "per_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2839,7 +3006,8 @@ static struct clk gpt6_ick = {
        .prcm_mod       = OMAP3430_PER_MOD,
        .enable_reg     = CM_ICLKEN,
        .enable_bit     = OMAP3430_EN_GPT6_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_GPT6_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "per_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2850,7 +3018,8 @@ static struct clk gpt5_ick = {
        .prcm_mod       = OMAP3430_PER_MOD,
        .enable_reg     = CM_ICLKEN,
        .enable_bit     = OMAP3430_EN_GPT5_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_GPT5_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "per_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2861,7 +3030,8 @@ static struct clk gpt4_ick = {
        .prcm_mod       = OMAP3430_PER_MOD,
        .enable_reg     = CM_ICLKEN,
        .enable_bit     = OMAP3430_EN_GPT4_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_GPT4_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "per_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2872,7 +3042,8 @@ static struct clk gpt3_ick = {
        .prcm_mod       = OMAP3430_PER_MOD,
        .enable_reg     = CM_ICLKEN,
        .enable_bit     = OMAP3430_EN_GPT3_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_GPT3_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "per_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2883,7 +3054,8 @@ static struct clk gpt2_ick = {
        .prcm_mod       = OMAP3430_PER_MOD,
        .enable_reg     = CM_ICLKEN,
        .enable_bit     = OMAP3430_EN_GPT2_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_GPT2_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "per_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2895,7 +3067,8 @@ static struct clk mcbsp2_ick = {
        .prcm_mod       = OMAP3430_PER_MOD,
        .enable_reg     = CM_ICLKEN,
        .enable_bit     = OMAP3430_EN_MCBSP2_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_MCBSP2_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "per_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2907,7 +3080,8 @@ static struct clk mcbsp3_ick = {
        .prcm_mod       = OMAP3430_PER_MOD,
        .enable_reg     = CM_ICLKEN,
        .enable_bit     = OMAP3430_EN_MCBSP3_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_MCBSP3_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "per_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2919,7 +3093,8 @@ static struct clk mcbsp4_ick = {
        .prcm_mod       = OMAP3430_PER_MOD,
        .enable_reg     = CM_ICLKEN,
        .enable_bit     = OMAP3430_EN_MCBSP4_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_MCBSP4_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "per_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -2950,7 +3125,8 @@ static struct clk mcbsp2_fck = {
        .prcm_mod       = OMAP3430_PER_MOD,
        .enable_reg     = CM_FCLKEN,
        .enable_bit     = OMAP3430_EN_MCBSP2_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_MCBSP2_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "per_clkdm" },
        .recalc         = &omap2_clksel_recalc,
 };
@@ -2975,7 +3151,8 @@ static struct clk mcbsp3_fck = {
        .prcm_mod       = OMAP3430_PER_MOD,
        .enable_reg     = CM_FCLKEN,
        .enable_bit     = OMAP3430_EN_MCBSP3_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_MCBSP3_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "per_clkdm" },
        .recalc         = &omap2_clksel_recalc,
 };
@@ -3000,7 +3177,8 @@ static struct clk mcbsp4_fck = {
        .prcm_mod       = OMAP3430_PER_MOD,
        .enable_reg     = CM_FCLKEN,
        .enable_bit     = OMAP3430_EN_MCBSP4_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
+       .idlest_bit     = OMAP3430_ST_MCBSP4_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | WAIT_READY,
        .clkdm          = { .name = "per_clkdm" },
        .recalc         = &omap2_clksel_recalc,
 };
@@ -3165,7 +3343,8 @@ static struct clk sr1_fck = {
        .prcm_mod       = WKUP_MOD,
        .enable_reg     = CM_FCLKEN,
        .enable_bit     = OMAP3430_EN_SR1_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X | RATE_PROPAGATES,
+       .idlest_bit     = OMAP3430_ST_SR1_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | RATE_PROPAGATES | WAIT_READY,
        .clkdm          = { .name = "prm_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -3177,7 +3356,8 @@ static struct clk sr2_fck = {
        .prcm_mod       = WKUP_MOD,
        .enable_reg     = CM_FCLKEN,
        .enable_bit     = OMAP3430_EN_SR2_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X | RATE_PROPAGATES,
+       .idlest_bit     = OMAP3430_ST_SR2_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | RATE_PROPAGATES | WAIT_READY,
        .clkdm          = { .name = "prm_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -3192,11 +3372,12 @@ static struct clk sr_l4_ick = {
 
 /* SECURE_32K_FCK clocks */
 
-/* XXX This clock no longer exists in 3430 TRM rev F */
+/* XXX Make sure idlest_bit/wait_ready with no enable_bit works */
 static struct clk gpt12_fck = {
        .name           = "gpt12_fck",
        .parent         = &secure_32k_fck,
-       .flags          = CLOCK_IN_OMAP343X | ALWAYS_ENABLED,
+       .idlest_bit     = OMAP3430_ST_GPT12_SHIFT,
+       .flags          = CLOCK_IN_OMAP343X | ALWAYS_ENABLED | WAIT_READY,
        .clkdm          = { .name = "prm_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -3303,10 +3484,13 @@ static struct clk *onchip_34xx_clks[] __initdata = {
        &fshostusb_fck,
        &core_12m_fck,
        &hdq_fck,
-       &ssi_ssr_fck,
-       &ssi_sst_fck,
+       &ssi_ssr_fck_3430es1,
+       &ssi_ssr_fck_3430es2,
+       &ssi_sst_fck_3430es1,
+       &ssi_sst_fck_3430es2,
        &core_l3_ick,
-       &hsotgusb_ick,
+       &hsotgusb_ick_3430es1,
+       &hsotgusb_ick_3430es2,
        &sdrc_ick,
        &gpmc_fck,
        &security_l3_ick,
@@ -3339,18 +3523,21 @@ static struct clk *onchip_34xx_clks[] __initdata = {
        &mailboxes_ick,
        &omapctrl_ick,
        &ssi_l4_ick,
-       &ssi_ick,
+       &ssi_ick_3430es1,
+       &ssi_ick_3430es2,
        &usb_l4_ick,
        &security_l4_ick2,
        &aes1_ick,
        &rng_ick,
        &sha11_ick,
        &des1_ick,
-       &dss1_alwon_fck,
+       &dss1_alwon_fck_3430es1,
+       &dss1_alwon_fck_3430es2,
        &dss_tv_fck,
        &dss_96m_fck,
        &dss2_alwon_fck,
-       &dss_ick,
+       &dss_ick_3430es1,
+       &dss_ick_3430es2,
        &cam_mclk,
        &cam_ick,
        &csi2_96m_fck,
diff --git a/arch/arm/mach-omap2/cm-regbits-24xx.h b/arch/arm/mach-omap2/cm-regbits-24xx.h
index 297a2fe634ea63a56345af7a51bb11c37e276f85..a9a0df522ca3882f940a729653dadbdfcc50b6e2 100644 (file)
--- a/arch/arm/mach-omap2/cm-regbits-24xx.h
+++ b/arch/arm/mach-omap2/cm-regbits-24xx.h
@@ -147,6 +147,7 @@
 
 /* CM_IDLEST3_CORE */
 /* 2430 only */
+#define OMAP2430_ST_SDRC_SHIFT                         2
 #define OMAP2430_ST_SDRC_MASK                          (1 << 2)
 
 /* CM_IDLEST4_CORE */
diff --git a/arch/arm/plat-omap/include/mach/clock.h b/arch/arm/plat-omap/include/mach/clock.h
index f094d5b77779e34d91248bc917d3b05f7e3bd369..f26ad8c3e357f9cbee50dafaba7d8fecf1f45877 100644 (file)
--- a/arch/arm/plat-omap/include/mach/clock.h
+++ b/arch/arm/plat-omap/include/mach/clock.h
@@ -70,6 +70,7 @@ struct clk {
        u16                     enable_reg;
        __u8                    enable_bit;
        __s8                    usecount;
+       u8                      idlest_bit;
        void                    (*recalc)(struct clk *);
        int                     (*set_rate)(struct clk *, unsigned long);
        long                    (*round_rate)(struct clk *, unsigned long);
@@ -143,7 +144,8 @@ extern void clk_init_cpufreq_table(struct cpufreq_frequency_table **table);
 #define CONFIG_PARTICIPANT     (1 << 10)       /* Fundamental clock */
 #define ENABLE_ON_INIT         (1 << 11)       /* Enable upon framework init */
 #define INVERT_ENABLE          (1 << 12)       /* 0 enables, 1 disables */
-/* bits 13-20 are currently free */
+#define WAIT_READY             (1 << 13)       /* wait for dev to leave idle */
+/* bits 14-20 are currently free */
 #define CLOCK_IN_OMAP310       (1 << 21)
 #define CLOCK_IN_OMAP730       (1 << 22)
 #define CLOCK_IN_OMAP1510      (1 << 23)
@@ -153,14 +155,14 @@ extern void clk_init_cpufreq_table(struct cpufreq_frequency_table **table);
 #define CLOCK_IN_OMAP343X      (1 << 27)       /* clocks common to all 343X */
 #define PARENT_CONTROLS_CLOCK  (1 << 28)
 #define CLOCK_IN_OMAP3430ES1   (1 << 29)       /* 3430ES1 clocks only */
-#define CLOCK_IN_OMAP3430ES2   (1 << 30)       /* 3430ES2 clocks only */
+#define CLOCK_IN_OMAP3430ES2   (1 << 30)       /* 3430ES2+ clocks only */
 
 /* Clksel_rate flags */
 #define DEFAULT_RATE           (1 << 0)
 #define RATE_IN_242X           (1 << 1)
 #define RATE_IN_243X           (1 << 2)
 #define RATE_IN_343X           (1 << 3)        /* rates common to all 343X */
-#define RATE_IN_3430ES2                (1 << 4)        /* 3430ES2 rates only */
+#define RATE_IN_3430ES2                (1 << 4)        /* 3430ES2+ rates only */
 
 #define RATE_IN_24XX           (RATE_IN_242X | RATE_IN_243X)
 
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