PRCM: 34XX: Fix wrong shift value used in dpll4_m4x2_ck enable bit

Enable bit for dpll4_m4x2_ck is OMAP3430_PWRDN_DSS1_SHIFT instead of
OMAP3430_PWRDN_CAM_SHIFT.

Signed-off-by: Jouni Hogander <jouni.hogander@nokia.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index b4dceeabd7e9332763d40b2313c5eab6d5cb9f6c..4a8729ae38fdbd22fb65fc1e192897992042b0d0 100644 (file)
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -819,7 +819,7 @@ static struct clk dpll4_m4x2_ck = {
        .name           = "dpll4_m4x2_ck",
        .parent         = &dpll4_m4_ck,
        .enable_reg     = _OMAP34XX_CM_REGADDR(PLL_MOD, CM_CLKEN),
-       .enable_bit     = OMAP3430_PWRDN_CAM_SHIFT,
+       .enable_bit     = OMAP3430_PWRDN_DSS1_SHIFT,
        .flags          = CLOCK_IN_OMAP343X | RATE_PROPAGATES | INVERT_ENABLE,
        .recalc         = &omap3_clkoutx2_recalc,
 };