ACPI: restore comment justifying 'extra' P_LVLx access

While trying to look for superfluous I/O accesses that can be optimized
away, I stumbled upon this ACPI sleep I/O access and couldn't figure out
why the hell this dummy op was necessary.
After more than one hour of internet research, I had collected a sufficient
number of documents (among those very old kernel versions) that finally
told me what this dummy read was about: STPCLK# doesn't get asserted in time
on (some) chipsets, which is why we need to have a dummy I/O read to delay
further instruction processing until the CPU is fully stopped.

Signed-off-by: Andreas Mohr <andi@lisas.de>
Signed-off-by: Len Brown <len.brown@intel.com>

diff --git a/drivers/acpi/processor_idle.c b/drivers/acpi/processor_idle.c
index 89d3fd4c3cd2fea70b83db502dd8f0f4b7a54aeb..5551bfbc47aa565daccc5df43e42af5ee80c9c21 100644 (file)
--- a/drivers/acpi/processor_idle.c
+++ b/drivers/acpi/processor_idle.c
@@ -365,7 +365,9 @@ static void acpi_processor_idle(void)
                t1 = inl(acpi_fadt.xpm_tmr_blk.address);
                /* Invoke C2 */
                inb(cx->address);
-               /* Dummy op - must do something useless after P_LVL2 read */
+               /* Dummy wait op - must do something useless after P_LVL2 read
+                  because chipsets cannot guarantee that STPCLK# signal
+                  gets asserted in time to freeze execution properly. */
                t2 = inl(acpi_fadt.xpm_tmr_blk.address);
                /* Get end time (ticks) */
                t2 = inl(acpi_fadt.xpm_tmr_blk.address);
@@ -403,7 +405,7 @@ static void acpi_processor_idle(void)
                t1 = inl(acpi_fadt.xpm_tmr_blk.address);
                /* Invoke C3 */
                inb(cx->address);
-               /* Dummy op - must do something useless after P_LVL3 read */
+               /* Dummy wait op (see above) */
                t2 = inl(acpi_fadt.xpm_tmr_blk.address);
                /* Get end time (ticks) */
                t2 = inl(acpi_fadt.xpm_tmr_blk.address);