.name           = "gpio6_fck",
        .parent         = &per_32k_alwon_fck,
        .enable_reg     = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
-       .enable_bit     = OMAP3430_EN_GPT6_SHIFT,
+       .enable_bit     = OMAP3430_EN_GPIO6_SHIFT,
        .flags          = CLOCK_IN_OMAP343X,
        .recalc         = &followparent_recalc,
 };
        .name           = "gpio5_fck",
        .parent         = &per_32k_alwon_fck,
        .enable_reg     = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
-       .enable_bit     = OMAP3430_EN_GPT5_SHIFT,
+       .enable_bit     = OMAP3430_EN_GPIO5_SHIFT,
        .flags          = CLOCK_IN_OMAP343X,
        .recalc         = &followparent_recalc,
 };
        .name           = "gpio4_fck",
        .parent         = &per_32k_alwon_fck,
        .enable_reg     = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
-       .enable_bit     = OMAP3430_EN_GPT4_SHIFT,
+       .enable_bit     = OMAP3430_EN_GPIO4_SHIFT,
        .flags          = CLOCK_IN_OMAP343X,
        .recalc         = &followparent_recalc,
 };
        .name           = "gpio3_fck",
        .parent         = &per_32k_alwon_fck,
        .enable_reg     = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
-       .enable_bit     = OMAP3430_EN_GPT3_SHIFT,
+       .enable_bit     = OMAP3430_EN_GPIO3_SHIFT,
        .flags          = CLOCK_IN_OMAP343X,
        .recalc         = &followparent_recalc,
 };
        .name           = "gpio2_fck",
        .parent         = &per_32k_alwon_fck,
        .enable_reg     = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
-       .enable_bit     = OMAP3430_EN_GPT2_SHIFT,
+       .enable_bit     = OMAP3430_EN_GPIO2_SHIFT,
        .flags          = CLOCK_IN_OMAP343X,
        .recalc         = &followparent_recalc,
 };