{
        u32 wkup;
        omap2_clk_prepare_for_reboot();
-       wkup = prm_read_mod_reg(WKUP_MOD, RM_RSTCTRL) | OMAP_RST_DPLL3;
-       prm_write_mod_reg(wkup, WKUP_MOD, RM_RSTCTRL);
+
+       if (cpu_is_omap24xx()) {
+               wkup = prm_read_mod_reg(WKUP_MOD, RM_RSTCTRL) | OMAP_RST_DPLL3;
+               prm_write_mod_reg(wkup, WKUP_MOD, RM_RSTCTRL);
+       } else if (cpu_is_omap34xx()) {
+               wkup = prm_read_mod_reg(OMAP3430_GR_MOD, RM_RSTCTRL)
+                                                       | OMAP_RST_DPLL3;
+               prm_write_mod_reg(wkup, OMAP3430_GR_MOD, RM_RSTCTRL);
+       }
 }
 
 
 static inline void arch_reset(char mode)
 {
-       if (!cpu_is_omap24xx())
+       if (!cpu_class_is_omap2())
                omap1_arch_reset(mode);
        else
                omap_prcm_arch_reset(mode);