};
 
 /* No wkdeps or sleepdeps for 34xx core apparently */
-static struct powerdomain core_34xx_es1_pwrdm = {
+static struct powerdomain core_34xx_pre_es3_1_pwrdm = {
        .name             = "core_pwrdm",
        .prcm_offs        = CORE_MOD,
-       .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1),
+       .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 |
+                                          CHIP_IS_OMAP3430ES2 |
+                                          CHIP_IS_OMAP3430ES3_0),
        .pwrsts           = PWRSTS_OFF_RET_ON,
        .dep_bit          = OMAP3430_EN_CORE_SHIFT,
        .banks            = 2,
 };
 
 /* No wkdeps or sleepdeps for 34xx core apparently */
-static struct powerdomain core_34xx_es2_pwrdm = {
+static struct powerdomain core_34xx_es3_1_pwrdm = {
        .name             = "core_pwrdm",
        .prcm_offs        = CORE_MOD,
-       .omap_chip        = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2),
+       .omap_chip        = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES3_1),
        .pwrsts           = PWRSTS_OFF_RET_ON,
        .dep_bit          = OMAP3430_EN_CORE_SHIFT,
        .flags            = PWRDM_HAS_HDWR_SAR, /* for USBTLL only */