u16 radio_ver;          /* Radio version */
        u8 radio_rev;           /* Radio revision */
 
-       bool locked;            /* Only used in b43_phy_{un}lock() */
        bool dyn_tssi_tbl;      /* tssi2dbm is kmalloc()ed. */
 
        /* ACI (adjacent channel interference) flags. */
        s16 lna_gain;           /* LNA */
        s16 pga_gain;           /* PGA */
 
-       /* PHY lock for core.rev < 3
-        * This lock is only used by b43_phy_{un}lock()
-        */
-       spinlock_t lock;
-
        /* Desired TX power level (in dBm).
         * This is set by the user and adjusted in b43_phy_xmitpower(). */
        u8 power_level;
        struct b43_bbatt bbatt;
        struct b43_rfatt rfatt;
        u8 tx_control;          /* B43_TXCTL_XXX */
-#ifdef CONFIG_B43_DEBUG
-       bool manual_txpower_control;    /* Manual TX-power control enabled? */
-#endif
+
        /* Hardware Power Control enabled? */
        bool hardware_power_control;
 
                B43_OFDMTAB_DIRECTION_READ,
                B43_OFDMTAB_DIRECTION_WRITE,
        } ofdmtab_addr_direction;
+
+#if B43_DEBUG
+       /* Manual TX-power control enabled? */
+       bool manual_txpower_control;
+       /* PHY registers locked by b43_phy_lock()? */
+       bool phy_locked;
+#endif /* B43_DEBUG */
 };
 
 /* Data structures for DMA transmission, per 80211 core. */
 
 static int txpower_g_write_file(struct b43_wldev *dev,
                                const char *buf, size_t count)
 {
-       unsigned long phy_flags;
-
        if (dev->phy.type != B43_PHYTYPE_G)
                return -ENODEV;
        if ((count >= 4) && (memcmp(buf, "auto", 4) == 0)) {
                        dev->phy.tx_control |= B43_TXCTL_PA2DB;
                if (pa3db)
                        dev->phy.tx_control |= B43_TXCTL_PA3DB;
-               b43_phy_lock(dev, phy_flags);
+               b43_phy_lock(dev);
                b43_radio_lock(dev);
                b43_set_txpower_g(dev, &dev->phy.bbatt,
                                  &dev->phy.rfatt, dev->phy.tx_control);
                b43_radio_unlock(dev);
-               b43_phy_unlock(dev, phy_flags);
+               b43_phy_unlock(dev);
        }
 
        return 0;
 
        }
 }
 
-void b43_raw_phy_lock(struct b43_wldev *dev)
+/* Lock the PHY registers against concurrent access from the microcode.
+ * This lock is nonrecursive. */
+void b43_phy_lock(struct b43_wldev *dev)
 {
-       struct b43_phy *phy = &dev->phy;
-
-       B43_WARN_ON(!irqs_disabled());
-
-       /* We had a check for MACCTL==0 here, but I think that doesn't
-        * make sense, as MACCTL is never 0 when this is called.
-        *      --mb */
-       B43_WARN_ON(b43_read32(dev, B43_MMIO_MACCTL) == 0);
+#if B43_DEBUG
+       B43_WARN_ON(dev->phy.phy_locked);
+       dev->phy.phy_locked = 1;
+#endif
+       B43_WARN_ON(dev->dev->id.revision < 3);
 
-       if (dev->dev->id.revision < 3) {
-               b43_mac_suspend(dev);
-               spin_lock(&phy->lock);
-       } else {
-               if (!b43_is_mode(dev->wl, IEEE80211_IF_TYPE_AP))
-                       b43_power_saving_ctl_bits(dev, B43_PS_AWAKE);
-       }
-       phy->locked = 1;
+       if (!b43_is_mode(dev->wl, IEEE80211_IF_TYPE_AP))
+               b43_power_saving_ctl_bits(dev, B43_PS_AWAKE);
 }
 
-void b43_raw_phy_unlock(struct b43_wldev *dev)
+void b43_phy_unlock(struct b43_wldev *dev)
 {
-       struct b43_phy *phy = &dev->phy;
+#if B43_DEBUG
+       B43_WARN_ON(!dev->phy.phy_locked);
+       dev->phy.phy_locked = 0;
+#endif
+       B43_WARN_ON(dev->dev->id.revision < 3);
 
-       B43_WARN_ON(!irqs_disabled());
-       if (dev->dev->id.revision < 3) {
-               if (phy->locked) {
-                       spin_unlock(&phy->lock);
-                       b43_mac_enable(dev);
-               }
-       } else {
-               if (!b43_is_mode(dev->wl, IEEE80211_IF_TYPE_AP))
-                       b43_power_saving_ctl_bits(dev, 0);
-       }
-       phy->locked = 0;
+       if (!b43_is_mode(dev->wl, IEEE80211_IF_TYPE_AP))
+               b43_power_saving_ctl_bits(dev, 0);
 }
 
 /* Different PHYs require different register routing flags.
                        int rfatt_delta, bbatt_delta;
                        int rfatt, bbatt;
                        u8 tx_control;
-                       unsigned long phylock_flags;
 
                        tmp = b43_shm_read16(dev, B43_SHM_SHARED, 0x0058);
                        v0 = (s8) (tmp & 0x00FF);
                        phy->bbatt.att = bbatt;
 
                        /* Adjust the hardware */
-                       b43_phy_lock(dev, phylock_flags);
+                       b43_phy_lock(dev);
                        b43_radio_lock(dev);
                        b43_set_txpower_g(dev, &phy->bbatt, &phy->rfatt,
                                          phy->tx_control);
                        b43_lo_g_ctl_mark_cur_used(dev);
                        b43_radio_unlock(dev);
-                       b43_phy_unlock(dev, phylock_flags);
+                       b43_phy_unlock(dev);
                        break;
                }
        default:
        u32 macctl;
 
        macctl = b43_read32(dev, B43_MMIO_MACCTL);
+       B43_WARN_ON(macctl & B43_MACCTL_RADIOLOCK);
        macctl |= B43_MACCTL_RADIOLOCK;
        b43_write32(dev, B43_MMIO_MACCTL, macctl);
        /* Commit the write and wait for the device
        b43_read16(dev, B43_MMIO_PHY_VER);
        /* unlock */
        macctl = b43_read32(dev, B43_MMIO_MACCTL);
+       B43_WARN_ON(!(macctl & B43_MACCTL_RADIOLOCK));
        macctl &= ~B43_MACCTL_RADIOLOCK;
        b43_write32(dev, B43_MMIO_MACCTL, macctl);
 }
        u8 ret[13];
        unsigned int channel = phy->channel;
        unsigned int i, j, start, end;
-       unsigned long phylock_flags;
 
        if (!((phy->type == B43_PHYTYPE_G) && (phy->rev > 0)))
                return 0;
 
-       b43_phy_lock(dev, phylock_flags);
+       b43_phy_lock(dev);
        b43_radio_lock(dev);
        b43_phy_write(dev, 0x0802, b43_phy_read(dev, 0x0802) & 0xFFFC);
        b43_phy_write(dev, B43_PHY_G_CRS,
                        ret[j] = 1;
        }
        b43_radio_unlock(dev);
-       b43_phy_unlock(dev, phylock_flags);
+       b43_phy_unlock(dev);
 
        return ret[channel - 1];
 }
 
 #define B43_PHYVER_TYPE_SHIFT          8
 #define B43_PHYVER_VERSION             0x00FF
 
-void b43_raw_phy_lock(struct b43_wldev *dev);
-#define b43_phy_lock(dev, flags) \
-       do {                                    \
-               local_irq_save(flags);          \
-               b43_raw_phy_lock(dev);  \
-       } while (0)
-void b43_raw_phy_unlock(struct b43_wldev *dev);
-#define b43_phy_unlock(dev, flags) \
-       do {                                    \
-               b43_raw_phy_unlock(dev);        \
-               local_irq_restore(flags);       \
-       } while (0)
+void b43_phy_lock(struct b43_wldev *dev);
+void b43_phy_unlock(struct b43_wldev *dev);
 
 u16 b43_phy_read(struct b43_wldev *dev, u16 offset);
 void b43_phy_write(struct b43_wldev *dev, u16 offset, u16 val);