#ifdef CONFIG_ARCH_OMAP730
 static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = {
        {
+               .phys_base      = OMAP730_MCBSP1_BASE,
                .virt_base      = io_p2v(OMAP730_MCBSP1_BASE),
                .dma_rx_sync    = OMAP_DMA_MCBSP1_RX,
                .dma_tx_sync    = OMAP_DMA_MCBSP1_TX,
                .ops            = &omap1_mcbsp_ops,
        },
        {
+               .phys_base      = OMAP730_MCBSP2_BASE,
                .virt_base      = io_p2v(OMAP730_MCBSP2_BASE),
                .dma_rx_sync    = OMAP_DMA_MCBSP3_RX,
                .dma_tx_sync    = OMAP_DMA_MCBSP3_TX,
 #ifdef CONFIG_ARCH_OMAP15XX
 static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
        {
+               .phys_base      = OMAP1510_MCBSP1_BASE,
                .virt_base      = OMAP1510_MCBSP1_BASE,
                .dma_rx_sync    = OMAP_DMA_MCBSP1_RX,
                .dma_tx_sync    = OMAP_DMA_MCBSP1_TX,
                .clk_name       = "mcbsp_clk",
                },
        {
+               .phys_base      = OMAP1510_MCBSP2_BASE,
                .virt_base      = io_p2v(OMAP1510_MCBSP2_BASE),
                .dma_rx_sync    = OMAP_DMA_MCBSP2_RX,
                .dma_tx_sync    = OMAP_DMA_MCBSP2_TX,
                .ops            = &omap1_mcbsp_ops,
        },
        {
+               .phys_base      = OMAP1510_MCBSP3_BASE,
                .virt_base      = OMAP1510_MCBSP3_BASE,
                .dma_rx_sync    = OMAP_DMA_MCBSP3_RX,
                .dma_tx_sync    = OMAP_DMA_MCBSP3_TX,
 #ifdef CONFIG_ARCH_OMAP16XX
 static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
        {
+               .phys_base      = OMAP1610_MCBSP1_BASE,
                .virt_base      = OMAP1610_MCBSP1_BASE,
                .dma_rx_sync    = OMAP_DMA_MCBSP1_RX,
                .dma_tx_sync    = OMAP_DMA_MCBSP1_TX,
                .clk_name       = "mcbsp_clk",
        },
        {
+               .phys_base      = OMAP1610_MCBSP2_BASE,
                .virt_base      = io_p2v(OMAP1610_MCBSP2_BASE),
                .dma_rx_sync    = OMAP_DMA_MCBSP2_RX,
                .dma_tx_sync    = OMAP_DMA_MCBSP2_TX,
                .ops            = &omap1_mcbsp_ops,
        },
        {
+               .phys_base      = OMAP1610_MCBSP3_BASE,
                .virt_base      = OMAP1610_MCBSP3_BASE,
                .dma_rx_sync    = OMAP_DMA_MCBSP3_RX,
                .dma_tx_sync    = OMAP_DMA_MCBSP3_TX,
 
 #ifdef CONFIG_ARCH_OMAP24XX
 static struct omap_mcbsp_platform_data omap24xx_mcbsp_pdata[] = {
        {
+               .phys_base      = OMAP24XX_MCBSP1_BASE,
                .virt_base      = OMAP2_IO_ADDRESS(OMAP24XX_MCBSP1_BASE),
                .dma_rx_sync    = OMAP24XX_DMA_MCBSP1_RX,
                .dma_tx_sync    = OMAP24XX_DMA_MCBSP1_TX,
                .clk_name       = "mcbsp_clk",
        },
        {
+               .phys_base      = OMAP24XX_MCBSP2_BASE,
                .virt_base      = OMAP2_IO_ADDRESS(OMAP24XX_MCBSP2_BASE),
                .dma_rx_sync    = OMAP24XX_DMA_MCBSP2_RX,
                .dma_tx_sync    = OMAP24XX_DMA_MCBSP2_TX,
 #ifdef CONFIG_ARCH_OMAP34XX
 static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
        {
+               .phys_base      = OMAP34XX_MCBSP1_BASE,
                .virt_base      = OMAP2_IO_ADDRESS(OMAP34XX_MCBSP1_BASE),
                .dma_rx_sync    = OMAP24XX_DMA_MCBSP1_RX,
                .dma_tx_sync    = OMAP24XX_DMA_MCBSP1_TX,
                .clk_name       = "mcbsp_clk",
        },
        {
+               .phys_base      = OMAP34XX_MCBSP2_BASE,
                .virt_base      = OMAP2_IO_ADDRESS(OMAP34XX_MCBSP2_BASE),
                .dma_rx_sync    = OMAP24XX_DMA_MCBSP2_RX,
                .dma_tx_sync    = OMAP24XX_DMA_MCBSP2_TX,
                .clk_name       = "mcbsp_clk",
        },
        {
+               .phys_base      = OMAP34XX_MCBSP3_BASE,
                .virt_base      = OMAP2_IO_ADDRESS(OMAP34XX_MCBSP3_BASE),
                .dma_rx_sync    = OMAP24XX_DMA_MCBSP3_RX,
                .dma_tx_sync    = OMAP24XX_DMA_MCBSP3_TX,
                .clk_name       = "mcbsp_clk",
        },
        {
+               .phys_base      = OMAP34XX_MCBSP4_BASE,
                .virt_base      = OMAP2_IO_ADDRESS(OMAP34XX_MCBSP4_BASE),
                .dma_rx_sync    = OMAP24XX_DMA_MCBSP4_RX,
                .dma_tx_sync    = OMAP24XX_DMA_MCBSP4_TX,
                .clk_name       = "mcbsp_clk",
        },
        {
+               .phys_base      = OMAP34XX_MCBSP5_BASE,
                .virt_base      = OMAP2_IO_ADDRESS(OMAP34XX_MCBSP5_BASE),
                .dma_rx_sync    = OMAP24XX_DMA_MCBSP5_RX,
                .dma_tx_sync    = OMAP24XX_DMA_MCBSP5_TX,
 
 };
 
 struct omap_mcbsp_platform_data {
+       unsigned long phys_base;
        u32 virt_base;
        u8 dma_rx_sync, dma_tx_sync;
        u16 rx_irq, tx_irq;
 
 struct omap_mcbsp {
        struct device *dev;
+       unsigned long phys_base;
        u32 io_base;
        u8 id;
        u8 free;
 
        omap_set_dma_dest_params(mcbsp->dma_tx_lch,
                                 src_port,
                                 OMAP_DMA_AMODE_CONSTANT,
-                                mcbsp->io_base + OMAP_MCBSP_REG_DXR1,
+                                mcbsp->phys_base + OMAP_MCBSP_REG_DXR1,
                                 0, 0);
 
        omap_set_dma_src_params(mcbsp->dma_tx_lch,
        omap_set_dma_src_params(mcbsp->dma_rx_lch,
                                src_port,
                                OMAP_DMA_AMODE_CONSTANT,
-                               mcbsp->io_base + OMAP_MCBSP_REG_DRR1,
+                               mcbsp->phys_base + OMAP_MCBSP_REG_DRR1,
                                0, 0);
 
        omap_set_dma_dest_params(mcbsp->dma_rx_lch,
        mcbsp->dma_tx_lch = -1;
        mcbsp->dma_rx_lch = -1;
 
+       mcbsp->phys_base = pdata->phys_base;
        mcbsp->io_base = pdata->virt_base;
        /* Default I/O is IRQ based */
        mcbsp->io_type = OMAP_MCBSP_IRQ_IO;