/* clock definitions */
 
 static struct clk init_clocks[] = {
-       { .name    = "nand",
-         .id      = -1,
-         .parent  = &clk_h,
-         .enable  = s3c24xx_clkcon_enable,
-         .ctrlbit = S3C2410_CLKCON_NAND
-       },
-       { .name    = "lcd",
-         .id      = -1,
-         .parent  = &clk_h,
-         .enable  = s3c24xx_clkcon_enable,
-         .ctrlbit = S3C2410_CLKCON_LCDC
-       },
-       { .name    = "usb-host",
-         .id      = -1,
-         .parent  = &clk_h,
-         .enable  = s3c24xx_clkcon_enable,
-         .ctrlbit = S3C2410_CLKCON_USBH
-       },
-       { .name    = "usb-device",
-         .id      = -1,
-         .parent  = &clk_h,
-         .enable  = s3c24xx_clkcon_enable,
-         .ctrlbit = S3C2410_CLKCON_USBD
-       },
-       { .name    = "timers",
-         .id      = -1,
-         .parent  = &clk_p,
-         .enable  = s3c24xx_clkcon_enable,
-         .ctrlbit = S3C2410_CLKCON_PWMT
-       },
-       { .name    = "sdi",
-         .id      = -1,
-         .parent  = &clk_p,
-         .enable  = s3c24xx_clkcon_enable,
-         .ctrlbit = S3C2410_CLKCON_SDI
-       },
-       { .name    = "uart",
-         .id      = 0,
-         .parent  = &clk_p,
-         .enable  = s3c24xx_clkcon_enable,
-         .ctrlbit = S3C2410_CLKCON_UART0
-       },
-       { .name    = "uart",
-         .id      = 1,
-         .parent  = &clk_p,
-         .enable  = s3c24xx_clkcon_enable,
-         .ctrlbit = S3C2410_CLKCON_UART1
-       },
-       { .name    = "uart",
-         .id      = 2,
-         .parent  = &clk_p,
-         .enable  = s3c24xx_clkcon_enable,
-         .ctrlbit = S3C2410_CLKCON_UART2
-       },
-       { .name    = "gpio",
-         .id      = -1,
-         .parent  = &clk_p,
-         .enable  = s3c24xx_clkcon_enable,
-         .ctrlbit = S3C2410_CLKCON_GPIO
-       },
-       { .name    = "rtc",
-         .id      = -1,
-         .parent  = &clk_p,
-         .enable  = s3c24xx_clkcon_enable,
-         .ctrlbit = S3C2410_CLKCON_RTC
-       },
-       { .name    = "adc",
-         .id      = -1,
-         .parent  = &clk_p,
-         .enable  = s3c24xx_clkcon_enable,
-         .ctrlbit = S3C2410_CLKCON_ADC
-       },
-       { .name    = "i2c",
-         .id      = -1,
-         .parent  = &clk_p,
-         .enable  = s3c24xx_clkcon_enable,
-         .ctrlbit = S3C2410_CLKCON_IIC
-       },
-       { .name    = "iis",
-         .id      = -1,
-         .parent  = &clk_p,
-         .enable  = s3c24xx_clkcon_enable,
-         .ctrlbit = S3C2410_CLKCON_IIS
-       },
-       { .name    = "spi",
-         .id      = -1,
-         .parent  = &clk_p,
-         .enable  = s3c24xx_clkcon_enable,
-         .ctrlbit = S3C2410_CLKCON_SPI
-       },
-       { .name    = "watchdog",
-         .id      = -1,
-         .parent  = &clk_p,
-         .ctrlbit = 0
+       {
+               .name           = "nand",
+               .id             = -1,
+               .parent         = &clk_h,
+               .enable         = s3c24xx_clkcon_enable,
+               .ctrlbit        = S3C2410_CLKCON_NAND,
+       }, {
+               .name           = "lcd",
+               .id             = -1,
+               .parent         = &clk_h,
+               .enable         = s3c24xx_clkcon_enable,
+               .ctrlbit        = S3C2410_CLKCON_LCDC,
+       }, {
+               .name           = "usb-host",
+               .id             = -1,
+               .parent         = &clk_h,
+               .enable         = s3c24xx_clkcon_enable,
+               .ctrlbit        = S3C2410_CLKCON_USBH,
+       }, {
+               .name           = "usb-device",
+               .id             = -1,
+               .parent         = &clk_h,
+               .enable         = s3c24xx_clkcon_enable,
+               .ctrlbit        = S3C2410_CLKCON_USBD,
+       }, {
+               .name           = "timers",
+               .id             = -1,
+               .parent         = &clk_p,
+               .enable         = s3c24xx_clkcon_enable,
+               .ctrlbit        = S3C2410_CLKCON_PWMT,
+       }, {
+               .name           = "sdi",
+               .id             = -1,
+               .parent         = &clk_p,
+               .enable         = s3c24xx_clkcon_enable,
+               .ctrlbit        = S3C2410_CLKCON_SDI,
+       }, {
+               .name           = "uart",
+               .id             = 0,
+               .parent         = &clk_p,
+               .enable         = s3c24xx_clkcon_enable,
+               .ctrlbit        = S3C2410_CLKCON_UART0,
+       }, {
+               .name           = "uart",
+               .id             = 1,
+               .parent         = &clk_p,
+               .enable         = s3c24xx_clkcon_enable,
+               .ctrlbit        = S3C2410_CLKCON_UART1,
+       }, {
+               .name           = "uart",
+               .id             = 2,
+               .parent         = &clk_p,
+               .enable         = s3c24xx_clkcon_enable,
+               .ctrlbit        = S3C2410_CLKCON_UART2,
+       }, {
+               .name           = "gpio",
+               .id             = -1,
+               .parent         = &clk_p,
+               .enable         = s3c24xx_clkcon_enable,
+               .ctrlbit        = S3C2410_CLKCON_GPIO,
+       }, {
+               .name           = "rtc",
+               .id             = -1,
+               .parent         = &clk_p,
+               .enable         = s3c24xx_clkcon_enable,
+               .ctrlbit        = S3C2410_CLKCON_RTC,
+       }, {
+               .name           = "adc",
+               .id             = -1,
+               .parent         = &clk_p,
+               .enable         = s3c24xx_clkcon_enable,
+               .ctrlbit        = S3C2410_CLKCON_ADC,
+       }, {
+               .name           = "i2c",
+               .id             = -1,
+               .parent         = &clk_p,
+               .enable         = s3c24xx_clkcon_enable,
+               .ctrlbit        = S3C2410_CLKCON_IIC,
+       }, {
+               .name           = "iis",
+               .id             = -1,
+               .parent         = &clk_p,
+               .enable         = s3c24xx_clkcon_enable,
+               .ctrlbit        = S3C2410_CLKCON_IIS,
+       }, {
+               .name           = "spi",
+               .id             = -1,
+               .parent         = &clk_p,
+               .enable         = s3c24xx_clkcon_enable,
+               .ctrlbit        = S3C2410_CLKCON_SPI,
+       }, {
+               .name           = "watchdog",
+               .id             = -1,
+               .parent         = &clk_p,
+               .ctrlbit        = 0,
        }
 };
 
        clk_p.rate = pclk;
        clk_f.rate = fclk;
 
-       /* it looks like just setting the register here is not good
-        * enough, and causes the odd hang at initial boot time, so
-        * do all of them indivdually.
+       /* We must be careful disabling the clocks we are not intending to
+        * be using at boot time, as subsytems such as the LCD which do
+        * their own DMA requests to the bus can cause the system to lockup
+        * if they where in the middle of requesting bus access.
         *
-        * I think disabling the LCD clock if the LCD is active is
-        * very dangerous, and therefore the bootloader should be
-        * careful to not enable the LCD clock if it is not needed.
-        *
-        * and of course, this looks neater
-        */
+        * Disabling the LCD clock if the LCD is active is very dangerous,
+        * and therefore the bootloader should be  careful to not enable
+        * the LCD clock if it is not needed.
+       */
 
        s3c24xx_clk_enable(S3C2410_CLKCON_NAND, 0);
        s3c24xx_clk_enable(S3C2410_CLKCON_USBH, 0);