From 0b29de4a6ac0936f56b974a3c19bd9c24ac5b5d7 Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Mon, 18 Sep 2006 23:20:55 +0100 Subject: [PATCH] [ARM] 3824/1: iop3xx: add cp6 enable/disable macros Add macros to enable and disable access to CP6. On the iop3xx, enabling CP6 access unfortunately also enables access to that coprocessor from unprivileged code, so we need these macros to enable and disable access to the coprocessor whenever we need to access it. Signed-off-by: Lennert Buytenhek Signed-off-by: Russell King --- include/asm-arm/hardware/iop3xx.h | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/include/asm-arm/hardware/iop3xx.h b/include/asm-arm/hardware/iop3xx.h index b21ea41b149..98b7cbc405e 100644 --- a/include/asm-arm/hardware/iop3xx.h +++ b/include/asm-arm/hardware/iop3xx.h @@ -132,6 +132,34 @@ unsigned long iop3xx_gettimeoffset(void); extern struct platform_device iop3xx_i2c0_device; extern struct platform_device iop3xx_i2c1_device; + +extern inline void iop3xx_cp6_enable(void) +{ + u32 temp; + + asm volatile ( + "mrc p15, 0, %0, c15, c1, 0\n\t" + "orr %0, %0, #(1 << 6)\n\t" + "mcr p15, 0, %0, c15, c1, 0\n\t" + "mrc p15, 0, %0, c15, c1, 0\n\t" + "mov %0, %0\n\t" + "sub pc, pc, #4\n\t" + : "=r" (temp) ); +} + +extern inline void iop3xx_cp6_disable(void) +{ + u32 temp; + + asm volatile ( + "mrc p15, 0, %0, c15, c1, 0\n\t" + "bic %0, %0, #(1 << 6)\n\t" + "mcr p15, 0, %0, c15, c1, 0\n\t" + "mrc p15, 0, %0, c15, c1, 0\n\t" + "mov %0, %0\n\t" + "sub pc, pc, #4\n\t" + : "=r" (temp) ); +} #endif -- 2.41.1